> -----Original Message-----
> From: Tim Harvey <tharvey@gateworks.com>
> Sent: 2022年10月13日 2:31
> To: Hongxing Zhu <hongxing.zhu@nxp.com>
> Cc: vkoul@kernel.org; a.fatoum@pengutronix.de; p.zabel@pengutronix.de;
> l.stach@pengutronix.de; bhelgaas@google.com; lorenzo.pieralisi@arm.com;
> robh@kernel.org; shawnguo@kernel.org; alexander.stein@ew.tq-group.com;
> marex@denx.de; richard.leitner@linux.dev; linux-phy@lists.infradead.org;
> devicetree@vger.kernel.org; linux-pci@vger.kernel.org;
> linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org;
> kernel@pengutronix.de; dl-linux-imx <linux-imx@nxp.com>
> Subject: Re: [PATCH v12 0/4] Add the iMX8MP PCIe support
> 
> On Mon, Oct 10, 2022 at 1:07 AM Richard Zhu <hongxing.zhu@nxp.com>
> wrote:
> >
> > Based on the 6.0-rc1 of the pci/next branch.
> > This series adds the i.MX8MP PCIe support and tested on i.MX8MP EVK
> > board when one PCIe NVME device is used.
> >
> 
> Richard,
> 
> This no longer applies to pci/next (pci-v6.1-changes) and needs to be rebased.
> It does apply on top of 6.0-rc1 but then the patches to pci-imx6.c and
> imx8mp.dtsi are missing so I'm not sure where to try to base this off of.
> 
> Do you have a repo for testing and have you been able to test a Gen3 link with
> A1 silicon yet?
> 
Hi Tim:
Thanks for your concerns.
Yes, I used one NVME device to test the Gen3 link on i.MX8MP(A1) EVK board.
Okay, I would resend this version after rebase to pci-v6.1-changes.

Best Regards
Richard Zhu

> Best Regards,
> 
> Tim