arch/arm64/boot/dts/qcom/ipq6018.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+)
Add node to support this bus inside of IPQ6018.
For example, this bus is used to work with the
voltage regulator (mp5496) on the Yuncore AX840 wireless AP.
Signed-off-by: Isaev Ruslan <legale.legale@gmail.com>
---
arch/arm64/boot/dts/qcom/ipq6018.dtsi | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
index e59b9df96c7e..745bfc6e2907 100644
--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
@@ -507,6 +507,21 @@ blsp1_i2c3: i2c@78b7000 {
status = "disabled";
};
+ blsp1_i2c6: i2c@78ba000 {
+ compatible = "qcom,i2c-qup-v2.2.1";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x078ba000 0x600>;
+ interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&gcc GCC_BLSP1_QUP6_I2C_APPS_CLK>,
+ <&gcc GCC_BLSP1_AHB_CLK>;
+ clock-names = "core", "iface";
+ clock-frequency = <100000>;
+ dmas = <&blsp_dma 22>, <&blsp_dma 23>;
+ dma-names = "tx", "rx";
+ status = "disabled";
+ };
+
qpic_bam: dma-controller@7984000 {
compatible = "qcom,bam-v1.7.0";
reg = <0x0 0x07984000 0x0 0x1a000>;
--
2.42.0On 15/11/2023 09:55, Legale Legale wrote:
> Add node to support this bus inside of IPQ6018.
> For example, this bus is used to work with the
> voltage regulator (mp5496) on the Yuncore AX840 wireless AP.
>
> Signed-off-by: Isaev Ruslan <legale.legale@gmail.com>
> ---
> arch/arm64/boot/dts/qcom/ipq6018.dtsi | 15 +++++++++++++++
> 1 file changed, 15 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
> b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
> index e59b9df96c7e..745bfc6e2907 100644
> --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
> +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
> @@ -507,6 +507,21 @@ blsp1_i2c3: i2c@78b7000 {
> status = "disabled";
> };
>
> + blsp1_i2c6: i2c@78ba000 {
> + compatible = "qcom,i2c-qup-v2.2.1";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x078ba000 0x600>;
reg = <0x0 0x078ba000 0x0 0x600>;
like the other regs here
> + interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&gcc GCC_BLSP1_QUP6_I2C_APPS_CLK>,
> + <&gcc GCC_BLSP1_AHB_CLK>;
> + clock-names = "core", "iface";
> + clock-frequency = <100000>;
Why not <400000>; as with other nodes ?
> + dmas = <&blsp_dma 22>, <&blsp_dma 23>;
> + dma-names = "tx", "rx";
> + status = "disabled";
> + };
> +
> qpic_bam: dma-controller@7984000 {
> compatible = "qcom,bam-v1.7.0";
> reg = <0x0 0x07984000 0x0 0x1a000>;
> --
> 2.42.0
>
What tree does this apply to ?
git checkout -b linux-next-6.7-rc1 v6.7-rc1
Switched to a new branch 'linux-next-6.7-rc1'
deckard@sagittarius-a:~/Development/qualcomm/qlt-kernel$ b4 shazam
CACDmYyf4hxbuw+cpKqEDnqmHpS9yPXuE5MPD5_XZ3hjmYuViUQ@mail.gmail.com
Grabbing thread from
lore.kernel.org/all/CACDmYyf4hxbuw%2BcpKqEDnqmHpS9yPXuE5MPD5_XZ3hjmYuViUQ@mail.gmail.com/t.mbox.gz
Checking for newer revisions
Grabbing search results from lore.kernel.org
Analyzing 1 messages in the thread
Checking attestation on all messages, may take a moment...
---
[PATCH] arm64: dts: qcom: ipq6018: add QUP5 I2C node
---
NOTE: install dkimpy for DKIM signature verification
---
Total patches: 1
---
Applying: arm64: dts: qcom: ipq6018: add QUP5 I2C node
Patch failed at 0001 arm64: dts: qcom: ipq6018: add QUP5 I2C node
When you have resolved this problem, run "git am --continue".
If you prefer to skip this patch, run "git am --skip" instead.
To restore the original branch and stop patching, run "git am --abort".
error: git diff header lacks filename information when removing 1
leading pathname component (line 6)
hint: Use 'git am --show-current-patch=diff' to see the failed patch
---
bod
update:
---
arch/arm64/boot/dts/qcom/ipq6018.dtsi | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
index e59b9df96..822ac51a0 100644
--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
@@ -506,6 +506,21 @@ blsp1_i2c3: i2c@78b7000 {
dma-names = "tx", "rx";
status = "disabled";
};
+
+ blsp1_i2c6: i2c@78ba000 {
+ compatible = "qcom,i2c-qup-v2.2.1";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x078ba000 0x600>;
+ interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&gcc GCC_BLSP1_QUP6_I2C_APPS_CLK>,
+ <&gcc GCC_BLSP1_AHB_CLK>;
+ clock-names = "core", "iface";
+ clock-frequency = <400000>;
+ dmas = <&blsp_dma 22>, <&blsp_dma 23>;
+ dma-names = "tx", "rx";
+ status = "disabled";
+ };
qpic_bam: dma-controller@7984000 {
compatible = "qcom,bam-v1.7.0";
--
2.42.0
On Wed, 15 Nov 2023 at 14:32, Bryan O'Donoghue
<bryan.odonoghue@linaro.org> wrote:
>
> On 15/11/2023 09:55, Legale Legale wrote:
> > Add node to support this bus inside of IPQ6018.
> > For example, this bus is used to work with the
> > voltage regulator (mp5496) on the Yuncore AX840 wireless AP.
> >
> > Signed-off-by: Isaev Ruslan <legale.legale@gmail.com>
> > ---
> > arch/arm64/boot/dts/qcom/ipq6018.dtsi | 15 +++++++++++++++
> > 1 file changed, 15 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
> > b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
> > index e59b9df96c7e..745bfc6e2907 100644
> > --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
> > @@ -507,6 +507,21 @@ blsp1_i2c3: i2c@78b7000 {
> > status = "disabled";
> > };
> >
> > + blsp1_i2c6: i2c@78ba000 {
> > + compatible = "qcom,i2c-qup-v2.2.1";
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + reg = <0x078ba000 0x600>;
>
> reg = <0x0 0x078ba000 0x0 0x600>;
> like the other regs here
>
> > + interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&gcc GCC_BLSP1_QUP6_I2C_APPS_CLK>,
> > + <&gcc GCC_BLSP1_AHB_CLK>;
> > + clock-names = "core", "iface";
> > + clock-frequency = <100000>;
>
> Why not <400000>; as with other nodes ?
This is typo.
>
> > + dmas = <&blsp_dma 22>, <&blsp_dma 23>;
> > + dma-names = "tx", "rx";
> > + status = "disabled";
> > + };
> > +
> > qpic_bam: dma-controller@7984000 {
> > compatible = "qcom,bam-v1.7.0";
> > reg = <0x0 0x07984000 0x0 0x1a000>;
> > --
> > 2.42.0
> >
>
> What tree does this apply to ?
this is master branch
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/snapshot/linux-6.7-rc1.tar.gz
--branch master --depth=1 ./kernel
>
> git checkout -b linux-next-6.7-rc1 v6.7-rc1
> Switched to a new branch 'linux-next-6.7-rc1'
>
> deckard@sagittarius-a:~/Development/qualcomm/qlt-kernel$ b4 shazam
> CACDmYyf4hxbuw+cpKqEDnqmHpS9yPXuE5MPD5_XZ3hjmYuViUQ@mail.gmail.com
>
> Grabbing thread from
> lore.kernel.org/all/CACDmYyf4hxbuw%2BcpKqEDnqmHpS9yPXuE5MPD5_XZ3hjmYuViUQ@mail.gmail.com/t.mbox.gz
> Checking for newer revisions
> Grabbing search results from lore.kernel.org
> Analyzing 1 messages in the thread
> Checking attestation on all messages, may take a moment...
> ---
> [PATCH] arm64: dts: qcom: ipq6018: add QUP5 I2C node
> ---
> NOTE: install dkimpy for DKIM signature verification
> ---
> Total patches: 1
> ---
> Applying: arm64: dts: qcom: ipq6018: add QUP5 I2C node
> Patch failed at 0001 arm64: dts: qcom: ipq6018: add QUP5 I2C node
> When you have resolved this problem, run "git am --continue".
> If you prefer to skip this patch, run "git am --skip" instead.
> To restore the original branch and stop patching, run "git am --abort".
> error: git diff header lacks filename information when removing 1
> leading pathname component (line 6)
> hint: Use 'git am --show-current-patch=diff' to see the failed patch
>
> ---
> bod
On 15/11/2023 13:58, Legale Legale wrote: > + reg = <0x078ba000 0x600>; This still doesn't look right. --- bod
update again:
---
arch/arm64/boot/dts/qcom/ipq6018.dtsi | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
index e59b9df96..822ac51a0 100644
--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
@@ -506,6 +506,21 @@ blsp1_i2c3: i2c@78b7000 {
dma-names = "tx", "rx";
status = "disabled";
};
+
+ blsp1_i2c6: i2c@78ba000 {
+ compatible = "qcom,i2c-qup-v2.2.1";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x078ba000 0x600>;
+ interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&gcc GCC_BLSP1_QUP6_I2C_APPS_CLK>,
+ <&gcc GCC_BLSP1_AHB_CLK>;
+ clock-names = "core", "iface";
+ clock-frequency = <400000>;
+ dmas = <&blsp_dma 22>, <&blsp_dma 23>;
+ dma-names = "tx", "rx";
+ status = "disabled";
+ };
qpic_bam: dma-controller@7984000 {
compatible = "qcom,bam-v1.7.0";
--
2.42.0
On Wed, 15 Nov 2023 at 17:16, Bryan O'Donoghue
<bryan.odonoghue@linaro.org> wrote:
>
> On 15/11/2023 13:58, Legale Legale wrote:
> > + reg = <0x078ba000 0x600>;
>
> This still doesn't look right.
>
> ---
> bod
Wrong file. sorry. This one is correct:
---
arch/arm64/boot/dts/qcom/ipq6018.dtsi | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
index e59b9df96..00a61de9d 100644
--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
@@ -506,6 +506,21 @@ blsp1_i2c3: i2c@78b7000 {
dma-names = "tx", "rx";
status = "disabled";
};
+
+ blsp1_i2c6: i2c@78ba000 {
+ compatible = "qcom,i2c-qup-v2.2.1";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0 0x078ba000 0x0 0x600>;
+ interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&gcc GCC_BLSP1_QUP6_I2C_APPS_CLK>,
+ <&gcc GCC_BLSP1_AHB_CLK>;
+ clock-names = "core", "iface";
+ clock-frequency = <400000>;
+ dmas = <&blsp_dma 22>, <&blsp_dma 23>;
+ dma-names = "tx", "rx";
+ status = "disabled";
+ };
qpic_bam: dma-controller@7984000 {
compatible = "qcom,bam-v1.7.0";
--
2.42.0
On Wed, 15 Nov 2023 at 17:18, Legale Legale <legale.legale@gmail.com> wrote:
>
> update again:
>
> ---
> arch/arm64/boot/dts/qcom/ipq6018.dtsi | 15 +++++++++++++++
> 1 file changed, 15 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
> b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
> index e59b9df96..822ac51a0 100644
> --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
> +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
> @@ -506,6 +506,21 @@ blsp1_i2c3: i2c@78b7000 {
> dma-names = "tx", "rx";
> status = "disabled";
> };
> +
> + blsp1_i2c6: i2c@78ba000 {
> + compatible = "qcom,i2c-qup-v2.2.1";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x078ba000 0x600>;
> + interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&gcc GCC_BLSP1_QUP6_I2C_APPS_CLK>,
> + <&gcc GCC_BLSP1_AHB_CLK>;
> + clock-names = "core", "iface";
> + clock-frequency = <400000>;
> + dmas = <&blsp_dma 22>, <&blsp_dma 23>;
> + dma-names = "tx", "rx";
> + status = "disabled";
> + };
>
> qpic_bam: dma-controller@7984000 {
> compatible = "qcom,bam-v1.7.0";
> --
> 2.42.0
>
> On Wed, 15 Nov 2023 at 17:16, Bryan O'Donoghue
> <bryan.odonoghue@linaro.org> wrote:
> >
> > On 15/11/2023 13:58, Legale Legale wrote:
> > > + reg = <0x078ba000 0x600>;
> >
> > This still doesn't look right.
> >
> > ---
> > bod
On 15/11/2023 14:20, Legale Legale wrote:
> Wrong file. sorry. This one is correct:
Top posting makes Alan Turning cry.
https://docs.kernel.org/process/submitting-patches.html#use-trimmed-interleaved-replies-in-email-discussions
> ---
> arch/arm64/boot/dts/qcom/ipq6018.dtsi | 15 +++++++++++++++
> 1 file changed, 15 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
> b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
> index e59b9df96..00a61de9d 100644
> --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
> +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
> @@ -506,6 +506,21 @@ blsp1_i2c3: i2c@78b7000 {
> dma-names = "tx", "rx";
> status = "disabled";
> };
> +
> + blsp1_i2c6: i2c@78ba000 {
> + compatible = "qcom,i2c-qup-v2.2.1";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x0 0x078ba000 0x0 0x600>;
> + interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&gcc GCC_BLSP1_QUP6_I2C_APPS_CLK>,
> + <&gcc GCC_BLSP1_AHB_CLK>;
> + clock-names = "core", "iface";
> + clock-frequency = <400000>;
> + dmas = <&blsp_dma 22>, <&blsp_dma 23>;
> + dma-names = "tx", "rx";
> + status = "disabled";
> + };
>
> qpic_bam: dma-controller@7984000 {
> compatible = "qcom,bam-v1.7.0";
> --
So you need to make a V2 of this patch.
1. Suggested changing "Legale Leagle" to your signoff name
Isaev Ruslan <legale.legale@gmail.com>
2. Please remember to run dtbs_check and dtbs_binding_check
The dtb checks should catch errors like the register size.
---
bod
© 2016 - 2025 Red Hat, Inc.