>From 748db76c8e9f6e5906be0033dcdec9bb5749b303 Mon Sep 17 00:00:00 2001
From: Gabriel <gshahrouzi@gmail.com>
Date: Mon, 24 Feb 2025 18:09:26 -0500
Subject: [PATCH] Docs/arch/arm64: Fix spelling in amu.rst

Change though to through.

Signed-off-by: Gabriel <gshahrouzi@gmail.com>
---
 Documentation/arch/arm64/amu.rst | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Documentation/arch/arm64/amu.rst b/Documentation/arch/arm64/amu.rst
index 01f2de2b0450..ac1b3f0e211d 100644
--- a/Documentation/arch/arm64/amu.rst
+++ b/Documentation/arch/arm64/amu.rst
@@ -80,7 +80,7 @@ bypass the setting of AMUSERENR_EL0 to trap accesses from EL0 (userspace) to
 EL1 (kernel). Therefore, firmware should still ensure accesses to AMU registers
 are not trapped in EL2/EL3.
 
-The fixed counters of AMUv1 are accessible though the following system
+The fixed counters of AMUv1 are accessible through the following system
 register definitions:
 
  - SYS_AMEVCNTR0_CORE_EL0
-- 
2.45.2

gshahrouzi@gmail.com writes:

>>From 748db76c8e9f6e5906be0033dcdec9bb5749b303 Mon Sep 17 00:00:00 2001
> From: Gabriel <gshahrouzi@gmail.com>
> Date: Mon, 24 Feb 2025 18:09:26 -0500
> Subject: [PATCH] Docs/arch/arm64: Fix spelling in amu.rst
>
> Change though to through.
>
> Signed-off-by: Gabriel <gshahrouzi@gmail.com>
> ---
>  Documentation/arch/arm64/amu.rst | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/Documentation/arch/arm64/amu.rst b/Documentation/arch/arm64/amu.rst
> index 01f2de2b0450..ac1b3f0e211d 100644
> --- a/Documentation/arch/arm64/amu.rst
> +++ b/Documentation/arch/arm64/amu.rst
> @@ -80,7 +80,7 @@ bypass the setting of AMUSERENR_EL0 to trap accesses from EL0 (userspace) to
>  EL1 (kernel). Therefore, firmware should still ensure accesses to AMU registers
>  are not trapped in EL2/EL3.
>  
> -The fixed counters of AMUv1 are accessible though the following system
> +The fixed counters of AMUv1 are accessible through the following system
>  register definitions:

Applied, thanks.

jon