Clocks for SerDes and PHY are going to be handled by standalone drivers
for each of those hardware components. Drop them from the Ethernet driver.

The clocks which are being removed for this patch are responsible for
the for the SerDes PCS and PHYs used for the 2nd and 3rd MAC which are
anyway not yet supported. Hence backwards compatibility is not an issue.

Fixes: 445eb6448ed3 ("net: ethernet: mtk_eth_soc: add basic support for MT7988 SoC")
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
The dt-bindings part has been taken care of already in commit
cc349b0771dc dt-bindings: net: mediatek: remove wrongly added clocks and SerDes

Changes since v1:
Improve commit message and explain why backward compatibility is not an issue,
as requested by Andrew Lunn. Patch content remains unchanged.

 drivers/net/ethernet/mediatek/mtk_eth_soc.h | 14 --------------
 1 file changed, 14 deletions(-)

diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.h b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
index eb1708b43aa3e..0d5225f1d3eef 100644
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
@@ -724,12 +724,8 @@ enum mtk_clks_map {
 	MTK_CLK_ETHWARP_WOCPU2,
 	MTK_CLK_ETHWARP_WOCPU1,
 	MTK_CLK_ETHWARP_WOCPU0,
-	MTK_CLK_TOP_USXGMII_SBUS_0_SEL,
-	MTK_CLK_TOP_USXGMII_SBUS_1_SEL,
 	MTK_CLK_TOP_SGM_0_SEL,
 	MTK_CLK_TOP_SGM_1_SEL,
-	MTK_CLK_TOP_XFI_PHY_0_XTAL_SEL,
-	MTK_CLK_TOP_XFI_PHY_1_XTAL_SEL,
 	MTK_CLK_TOP_ETH_GMII_SEL,
 	MTK_CLK_TOP_ETH_REFCK_50M_SEL,
 	MTK_CLK_TOP_ETH_SYS_200M_SEL,
@@ -800,19 +796,9 @@ enum mtk_clks_map {
 				 BIT_ULL(MTK_CLK_GP3) | BIT_ULL(MTK_CLK_XGP1) | \
 				 BIT_ULL(MTK_CLK_XGP2) | BIT_ULL(MTK_CLK_XGP3) | \
 				 BIT_ULL(MTK_CLK_CRYPTO) | \
-				 BIT_ULL(MTK_CLK_SGMII_TX_250M) | \
-				 BIT_ULL(MTK_CLK_SGMII_RX_250M) | \
-				 BIT_ULL(MTK_CLK_SGMII2_TX_250M) | \
-				 BIT_ULL(MTK_CLK_SGMII2_RX_250M) | \
 				 BIT_ULL(MTK_CLK_ETHWARP_WOCPU2) | \
 				 BIT_ULL(MTK_CLK_ETHWARP_WOCPU1) | \
 				 BIT_ULL(MTK_CLK_ETHWARP_WOCPU0) | \
-				 BIT_ULL(MTK_CLK_TOP_USXGMII_SBUS_0_SEL) | \
-				 BIT_ULL(MTK_CLK_TOP_USXGMII_SBUS_1_SEL) | \
-				 BIT_ULL(MTK_CLK_TOP_SGM_0_SEL) | \
-				 BIT_ULL(MTK_CLK_TOP_SGM_1_SEL) | \
-				 BIT_ULL(MTK_CLK_TOP_XFI_PHY_0_XTAL_SEL) | \
-				 BIT_ULL(MTK_CLK_TOP_XFI_PHY_1_XTAL_SEL) | \
 				 BIT_ULL(MTK_CLK_TOP_ETH_GMII_SEL) | \
 				 BIT_ULL(MTK_CLK_TOP_ETH_REFCK_50M_SEL) | \
 				 BIT_ULL(MTK_CLK_TOP_ETH_SYS_200M_SEL) | \
-- 
2.45.2

On Mon, 29 Jul 2024 00:00:23 +0100 Daniel Golle wrote:
> Clocks for SerDes and PHY are going to be handled by standalone drivers
> for each of those hardware components. Drop them from the Ethernet driver.
> 
> The clocks which are being removed for this patch are responsible for
> the for the SerDes PCS and PHYs used for the 2nd and 3rd MAC which are
> anyway not yet supported. Hence backwards compatibility is not an issue.

What user visible issue is it fixing, then?

On 7/30/24 04:06, Jakub Kicinski wrote:
> On Mon, 29 Jul 2024 00:00:23 +0100 Daniel Golle wrote:
>> Clocks for SerDes and PHY are going to be handled by standalone drivers
>> for each of those hardware components. Drop them from the Ethernet driver.
>>
>> The clocks which are being removed for this patch are responsible for
>> the for the SerDes PCS and PHYs used for the 2nd and 3rd MAC which are
>> anyway not yet supported. Hence backwards compatibility is not an issue.
> 
> What user visible issue is it fixing, then?

Indeed this looks like more a cleanup than a fix. @Daniel why net-next 
without fixes tag is not a suitable target here?

Thanks!

Paolo

On Tue, Jul 30, 2024 at 10:53:19AM +0200, Paolo Abeni wrote:
> On 7/30/24 04:06, Jakub Kicinski wrote:
> > On Mon, 29 Jul 2024 00:00:23 +0100 Daniel Golle wrote:
> > > Clocks for SerDes and PHY are going to be handled by standalone drivers
> > > for each of those hardware components. Drop them from the Ethernet driver.
> > > 
> > > The clocks which are being removed for this patch are responsible for
> > > the for the SerDes PCS and PHYs used for the 2nd and 3rd MAC which are
> > > anyway not yet supported. Hence backwards compatibility is not an issue.
> > 
> > What user visible issue is it fixing, then?
> 
> Indeed this looks like more a cleanup than a fix. @Daniel why net-next
> without fixes tag is not a suitable target here?

There is no user visible issue. I didn't know that this would be the
condition for going into 'net'. I will resend the patch to net-next.

On 7/30/24 12:22, Daniel Golle wrote:
> On Tue, Jul 30, 2024 at 10:53:19AM +0200, Paolo Abeni wrote:
>> On 7/30/24 04:06, Jakub Kicinski wrote:
>>> On Mon, 29 Jul 2024 00:00:23 +0100 Daniel Golle wrote:
>>>> Clocks for SerDes and PHY are going to be handled by standalone drivers
>>>> for each of those hardware components. Drop them from the Ethernet driver.
>>>>
>>>> The clocks which are being removed for this patch are responsible for
>>>> the for the SerDes PCS and PHYs used for the 2nd and 3rd MAC which are
>>>> anyway not yet supported. Hence backwards compatibility is not an issue.
>>>
>>> What user visible issue is it fixing, then?
>>
>> Indeed this looks like more a cleanup than a fix. @Daniel why net-next
>> without fixes tag is not a suitable target here?
> 
> There is no user visible issue. I didn't know that this would be the
> condition for going into 'net'. I will resend the patch to net-next.

See:

https://elixir.bootlin.com/linux/v6.10.2/source/Documentation/process/maintainer-netdev.rst#L68

The main point here is the patch looks more a cleanup than a fix.

If so, please also drop the fixes tag when re-posting, thanks!

Paolo