>-----Original Message-----
>From: Dave Jiang <dave.jiang@intel.com>
>Sent: 10 January 2025 20:18
>To: Shiju Jose <shiju.jose@huawei.com>; Jonathan Cameron
><jonathan.cameron@huawei.com>
>Cc: dan.j.williams@intel.com; alison.schofield@intel.com; nifan.cxl@gmail.com;
>vishal.l.verma@intel.com; ira.weiny@intel.com; dave@stgolabs.net; linux-
>cxl@vger.kernel.org; linux-kernel@vger.kernel.org; Linuxarm
><linuxarm@huawei.com>; tanxiaofei <tanxiaofei@huawei.com>; Zengtao (B)
><prime.zeng@hisilicon.com>
>Subject: Re: [PATCH v5 0/6] Update Event Records to CXL spec rev 3.1
>
>
>
>On 1/10/25 9:46 AM, Shiju Jose wrote:
>>> -----Original Message-----
>>> From: Jonathan Cameron <jonathan.cameron@huawei.com>
>>> Sent: 10 January 2025 16:07
>>> To: Shiju Jose <shiju.jose@huawei.com>
>>> Cc: dave.jiang@intel.com; dan.j.williams@intel.com;
>>> alison.schofield@intel.com; nifan.cxl@gmail.com;
>>> vishal.l.verma@intel.com; ira.weiny@intel.com; dave@stgolabs.net;
>>> linux-cxl@vger.kernel.org; linux-kernel@vger.kernel.org; Linuxarm
>>> <linuxarm@huawei.com>; tanxiaofei <tanxiaofei@huawei.com>; Zengtao
>>> (B) <prime.zeng@hisilicon.com>
>>> Subject: Re: [PATCH v5 0/6] Update Event Records to CXL spec rev 3.1
>>>
>>> On Fri, 10 Jan 2025 11:55:50 +0000
>>> <shiju.jose@huawei.com> wrote:
>>>
>>>> From: Shiju Jose <shiju.jose@huawei.com>
>>>>
>>>> Add updates in the CXL events records and CXL trace events
>>>> implementations for the changes in CXL spec rev 3.1.
>>>>
>>>> Shiju Jose (6):
>>>>   cxl/events: Update Common Event Record to CXL spec rev 3.1
>>>>   cxl/events: Add Component Identifier formatting for CXL spec rev 3.1
>>>>   cxl/events: Update General Media Event Record to CXL spec rev 3.1
>>>>   cxl/events: Update DRAM Event Record to CXL spec rev 3.1
>>>>   cxl/events: Update Memory Module Event Record to CXL spec rev 3.1
>>>>   cxl/test: Update test code for event records to CXL spec rev 3.1
>>>>
>>>> Changes:
>>>> V4 -> V5
>>>> 1. Reverted changes made in v4 for overcoming parsing error when
>>>> libtraceevent in userspace parses the CXL trace events, for rasdaemon.
>>>> This was due to trace event's format file is larger than PAGE_SIZE,
>>>> not supported reading complete format file in one go in the kernel
>>>> and thus fixed in the rasdaemon.
>>>
>>> Great to see that resolved.
>>>
>>>> 2. Rebased to v6.13-rc5.
>>>
>>> Should probably say why when doing a rebase to something other than rc1.
>>> In this case this is what cxl.git/next is based on after some fixes
>>> earlier in the cycle so a sensible choice for this set.
>>
>> I checked. These patches applied cleanly in cxl.git/next and buid okay.
>
>Hi Shiju,
>Can you please apply Ira's suggestions and respin a v6? Thanks!

Hi  Dave,

Sure. I added Ira's suggestions and please find v6 of the series here.
https://lore.kernel.org/all/20250111091756.1682-1-shiju.jose@huawei.com/

Thanks,
Shiju

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