> -----Original Message-----
> From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> Sent: Tuesday, December 26, 2023 9:33 PM
> To: JeeHeng Sia <jeeheng.sia@starfivetech.com>; kernel@esmil.dk; conor@kernel.org; robh+dt@kernel.org;
> krzysztof.kozlowski+dt@linaro.org; paul.walmsley@sifive.com; palmer@dabbelt.com; aou@eecs.berkeley.edu;
> mturquette@baylibre.com; sboyd@kernel.org; p.zabel@pengutronix.de; emil.renner.berthing@canonical.com; Hal Feng
> <hal.feng@starfivetech.com>; Xingyu Wu <xingyu.wu@starfivetech.com>
> Cc: linux-riscv@lists.infradead.org; devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; linux-clk@vger.kernel.org; Leyfoon Tan
> <leyfoon.tan@starfivetech.com>
> Subject: Re: [RFC 00/16] Basic clock and reset support for StarFive JH8100 RISC-V SoC
> 
> On 26/12/2023 06:38, Sia Jee Heng wrote:
> >
> > Patch 16 adds clocks and reset nodes to the JH8100 device tree.
> >
> > Changes since [2]:
> 
> Then this is v2, please version your patches correctly, so tools and
> people will understand it.
Noted. Will get it fixed in the next version.
> 
> Best regards,
> Krzysztof