[PATCH] Documentation: Clarify the affected CPUs list for Processor MMIO Stale Data

Pawan Gupta posted 1 patch 3 years, 10 months ago
.../admin-guide/hw-vuln/processor_mmio_stale_data.rst          | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
[PATCH] Documentation: Clarify the affected CPUs list for Processor MMIO Stale Data
Posted by Pawan Gupta 3 years, 10 months ago
Add clarifying text that list of affected processors is limited to the
processors that are within the support window.

Signed-off-by: Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
---
 .../admin-guide/hw-vuln/processor_mmio_stale_data.rst          | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/Documentation/admin-guide/hw-vuln/processor_mmio_stale_data.rst b/Documentation/admin-guide/hw-vuln/processor_mmio_stale_data.rst
index 9393c50b5afc..49c30ae53894 100644
--- a/Documentation/admin-guide/hw-vuln/processor_mmio_stale_data.rst
+++ b/Documentation/admin-guide/hw-vuln/processor_mmio_stale_data.rst
@@ -80,7 +80,8 @@ Not all the CPUs are affected by all the variants. For instance, most
 processors for the server market (excluding Intel Xeon E3 processors) are
 impacted by only Device Register Partial Write (DRPW).
 
-Below is the list of affected Intel processors [#f1]_:
+Below is the list of affected Intel processors within the support window at the
+time of disclosure [#f1]_:
 
    ===================  ============  =========
    Common name          Family_Model  Steppings
-- 
2.35.3