Missed calling flush_cache_range() before removing the sharing PMD entrires,
otherwise data consistence issue may be occurred on some architectures whose
caches are strict and require a virtual–>physical translation to exist for
a virtual address. Thus add it.

Fixes: 6dfeaff93be1 ("hugetlb/userfaultfd: unshare all pmds for hugetlbfs when register wp")
Signed-off-by: Baolin Wang <baolin.wang@linux.alibaba.com>
---
 mm/hugetlb.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/mm/hugetlb.c b/mm/hugetlb.c
index 74c9964..1945dfb 100644
--- a/mm/hugetlb.c
+++ b/mm/hugetlb.c
@@ -7058,6 +7058,7 @@ void hugetlb_unshare_all_pmds(struct vm_area_struct *vma)
 	if (start >= end)
 		return;
 
+	flush_cache_range(vma, start, end);
 	/*
 	 * No need to call adjust_range_if_pmd_sharing_possible(), because
 	 * we have already done the PUD_SIZE alignment.
-- 
1.8.3.1

On Sun, Apr 24, 2022 at 02:33:19PM +0800, Baolin Wang wrote:
> Missed calling flush_cache_range() before removing the sharing PMD entrires,
> otherwise data consistence issue may be occurred on some architectures whose
> caches are strict and require a virtual–>physical translation to exist for
> a virtual address. Thus add it.
> 
> Fixes: 6dfeaff93be1 ("hugetlb/userfaultfd: unshare all pmds for hugetlbfs when register wp")
> Signed-off-by: Baolin Wang <baolin.wang@linux.alibaba.com>

CONFIG_ARCH_WANT_HUGE_PMD_SHARE is only definded on riscv, arm64 and
x86.  All of them do not have a VIVT cache.  In others words,
flush_cache_range() is null on those architectures. So I suspect
in practice this does not cause any issue.  It is better to
clarify this in commit log.

Anyway:

Reviewed-by: Muchun Song <songmuchun@bytedance.com>

Thanks.

On Sun, Apr 24, 2022 at 03:45:02PM +0800, Muchun Song wrote:
> On Sun, Apr 24, 2022 at 02:33:19PM +0800, Baolin Wang wrote:
> > Missed calling flush_cache_range() before removing the sharing PMD entrires,
> > otherwise data consistence issue may be occurred on some architectures whose
> > caches are strict and require a virtual–>physical translation to exist for
> > a virtual address. Thus add it.
> > 
> > Fixes: 6dfeaff93be1 ("hugetlb/userfaultfd: unshare all pmds for hugetlbfs when register wp")
> > Signed-off-by: Baolin Wang <baolin.wang@linux.alibaba.com>
> 
> CONFIG_ARCH_WANT_HUGE_PMD_SHARE is only definded on riscv, arm64 and
> x86.  All of them do not have a VIVT cache.  In others words,
> flush_cache_range() is null on those architectures. So I suspect
> in practice this does not cause any issue.  It is better to
> clarify this in commit log.

Looks correct.

> 
> Anyway:
> 
> Reviewed-by: Muchun Song <songmuchun@bytedance.com>

Reviewed-by: Peter Xu <peterx@redhat.com>

Thanks,

-- 
Peter Xu

On 4/24/2022 3:45 PM, Muchun Song wrote:
> On Sun, Apr 24, 2022 at 02:33:19PM +0800, Baolin Wang wrote:
>> Missed calling flush_cache_range() before removing the sharing PMD entrires,
>> otherwise data consistence issue may be occurred on some architectures whose
>> caches are strict and require a virtual–>physical translation to exist for
>> a virtual address. Thus add it.
>>
>> Fixes: 6dfeaff93be1 ("hugetlb/userfaultfd: unshare all pmds for hugetlbfs when register wp")
>> Signed-off-by: Baolin Wang <baolin.wang@linux.alibaba.com>
> 
> CONFIG_ARCH_WANT_HUGE_PMD_SHARE is only definded on riscv, arm64 and
> x86.  All of them do not have a VIVT cache.  In others words,
> flush_cache_range() is null on those architectures. So I suspect
> in practice this does not cause any issue.  It is better to
> clarify this in commit log.

Yes, just from code inspection and to keep same behaviors when unmapping 
sharing PMD entrires in case more architectures can support 
CONFIG_ARCH_WANT_HUGE_PMD_SHARE in future. Will update the commit 
message in next version.

> 
> Anyway:
> 
> Reviewed-by: Muchun Song <songmuchun@bytedance.com>

Thanks.