Reporting an unclean read from SPI-NAND only when the maximum number
of correctable bitflip errors has been hit seems a bit late.
UBI LEB scrubbing, which depends on the lower MTD device reporting
correctable bitflips, then only kicks in when it's almost too late.

Set bitflip_threshold to 75% of the ECC strength, which is also the
default for raw NAND.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---
 drivers/mtd/nand/spi/core.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
index e0b6715e5dfed..018c854d06193 100644
--- a/drivers/mtd/nand/spi/core.c
+++ b/drivers/mtd/nand/spi/core.c
@@ -1287,6 +1287,7 @@ static int spinand_init(struct spinand_device *spinand)
 	/* Propagate ECC information to mtd_info */
 	mtd->ecc_strength = nanddev_get_ecc_conf(nand)->strength;
 	mtd->ecc_step_size = nanddev_get_ecc_conf(nand)->step_size;
+	mtd->bitflip_threshold = DIV_ROUND_UP(mtd->ecc_strength * 3, 4);
 
 	ret = spinand_create_dirmaps(spinand);
 	if (ret) {
-- 
2.46.0

On Mon, 2024-08-12 at 01:56:41 UTC, Daniel Golle wrote:
> Reporting an unclean read from SPI-NAND only when the maximum number
> of correctable bitflip errors has been hit seems a bit late.
> UBI LEB scrubbing, which depends on the lower MTD device reporting
> correctable bitflips, then only kicks in when it's almost too late.
> 
> Set bitflip_threshold to 75% of the ECC strength, which is also the
> default for raw NAND.
> 
> Signed-off-by: Daniel Golle <daniel@makrotopia.org>
> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>

Applied to https://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux.git nand/next, thanks.

Miquel

Hi Daniel,

On 12.08.24 3:56 AM, Daniel Golle wrote:
> Reporting an unclean read from SPI-NAND only when the maximum number
> of correctable bitflip errors has been hit seems a bit late.
> UBI LEB scrubbing, which depends on the lower MTD device reporting
> correctable bitflips, then only kicks in when it's almost too late.
> 
> Set bitflip_threshold to 75% of the ECC strength, which is also the
> default for raw NAND.
> 
> Signed-off-by: Daniel Golle <daniel@makrotopia.org>
> ---
>  drivers/mtd/nand/spi/core.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
> index e0b6715e5dfed..018c854d06193 100644
> --- a/drivers/mtd/nand/spi/core.c
> +++ b/drivers/mtd/nand/spi/core.c
> @@ -1287,6 +1287,7 @@ static int spinand_init(struct spinand_device *spinand)
>  	/* Propagate ECC information to mtd_info */
>  	mtd->ecc_strength = nanddev_get_ecc_conf(nand)->strength;
>  	mtd->ecc_step_size = nanddev_get_ecc_conf(nand)->step_size;
> +	mtd->bitflip_threshold = DIV_ROUND_UP(mtd->ecc_strength * 3, 4);

Is this just a theoretical adjustment or did you encounter any issues on
a real device? If the latter, could you add a sentence about your
use-case to the commit message?

In general the change looks good to me, so feel free to add:

Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>

But it would still be good to hear further opinions.

Thanks
Frieder