On 15/10/2026 16:51, Leo Yan wrote:
> SPE and TRBE write padding into their AUX buffers before advancing
> aux_head. Add the missing write barriers so that a userspace reader on
> another CPU cannot observe the new head before the padding stores
> become visible.
>
> AUX producers must make their data visible before publishing aux_head.
> The required synchronization depends on the trace hardware and CPU
> memory model, so the barriers belong in the drivers rather than in
> perf_aux_output_skip() or perf_aux_output_end(). The TRBE change also
> covers padding inserted by the overwrite erratum workaround before
> perf_aux_output_end().
>
> Signed-off-by: Leo Yan <leo.yan@arm.com>
> ---
> Leo Yan (2):
> perf: arm_spe: Order padding before publishing AUX head
> coresight: trbe: Order padding before publishing AUX head
>
> drivers/hwtracing/coresight/coresight-trbe.c | 2 ++
> drivers/perf/arm_spe_pmu.c | 5 ++++-
> 2 files changed, 6 insertions(+), 1 deletion(-)
> ---
> base-commit: 0fcb05b72344f40806cbe810de8872f1698bf053
> change-id: 20261015-add_barriers_for_perf_aux_output_skip-70356815b2bd
>
> Best regards,
Reviewed-by: James Clark <james.clark@linaro.org>