Add support for an older PSE controller that supports powering Type 1
and Type 2 PDs.

The chip has four individually controllable power channels, each with
it own detection, classification and current-limiting abilities.  The
driver declares the static power budgeting strategy.

---
RFC v2 -> v3:
    - The admin power limit is now configurable before the port is
      powered and is independent from the class limit.  However, when a
      PD is powered, the current limit is set by the minimum between the PD's
      class and the admin power limit, to maintain compliance with the IEEE
      spec.
    - The LTC4266 doesn't support reading a port's voltage (or current)
      until that port is completely and successfully powered.  Since we
      don't have a good way to measure the port voltage, we'll first try to
      use the vpwr-supply voltage if available during probe, and fall back to
      50V (the Type 2 PSE minimum) if the regulator isn't available (ENODEV or
      EPROBE_DEFER) or doesn't have a readable voltage for the port.  This is
      the voltage the LTC4266 driver will return back to pse core when a
      port's power good bit is not set.
    - Report the hardware admin state from the "Power Enabled" bit instead
      of the "Power Good" bit.  The latter is set when the port is fully
      powered (after inrush) so a port in the process of powering up looked
      disabled to the core and had power domain budget allocated to it twice.
    - Added a Maintainers entry for the driver.
    - Avoid precision loss in pi_get_actual_pw.
    - Demote a dev_err in a common path on device disconnection to
      dev_dbg.
    - Add an err: label in map_event that'll clear all the event
      registers via the INTCLR push-button to prevent a possible
      interrupt storm.
    - The supply and over-temperature faults were too hard to test, but
      they will result in a disconnection event for one or more
      channels.  Replace those faults with a combination of a "power good"
      change and a port status check to send a disconnect event to the pse
      core.
    - Bail out of probe early if we don't have the required IRQ.
    - Replace the driver's .remove with a devm action registered before
      the controller and the IRQ to ensure the IRQ is freed before this
      driver is removed.
    - Drop reset-gpios from the binding, since the driver doesn't
      support it at the moment (because my hardware doesn't have it
      correctly wired)
    - Expand the description for sense-resistor-micro-ohms to indicate
      the property is required by the chip for accurate current limiting.

Link to RFC v2: https://lore.kernel.org/all/20260820142429.2285172-1-kyle.swenson@est.tech/

Kyle Swenson (2):
  dt-bindings: net: pse-pd: Add bindings for LTC4266 PSE Controller
  net: pse-pd: Add LTC4266 PSE controller driver

 .../bindings/net/pse-pd/lltc,ltc4266.yaml     |  180 +++
 MAINTAINERS                                   |    7 +
 drivers/net/pse-pd/Kconfig                    |   11 +
 drivers/net/pse-pd/Makefile                   |    1 +
 drivers/net/pse-pd/ltc4266.c                  | 1386 +++++++++++++++++
 5 files changed, 1585 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/net/pse-pd/lltc,ltc4266.yaml
 create mode 100644 drivers/net/pse-pd/ltc4266.c

-- 
2.55.0