[PATCH] drm/bridge: anx7625: Fix register access in low-power mode

Arpit Saini posted 1 patch an hour ago
drivers/gpu/drm/bridge/analogix/anx7625.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
[PATCH] drm/bridge: anx7625: Fix register access in low-power mode
Posted by Arpit Saini an hour ago
The INTERFACE_CHANGE_INT_MASK register was accessed outside the
Type-C initialization path added for minimal Type-C support.

On platforms without Type-C support, this causes the driver to access
the RX-P0 I2C client while the ANX7625 is in its low-power configuration.
The access fails during probe and results in errors such as:

[drm:i2c_access_workaround.isra.0 [anx7625]] *ERROR* fail to access i2c id=3f :39
[drm:anx7625_i2c_probe [anx7625]] *ERROR* fail to write i2c id=3f :43

Keep the interrupt-mask update within the low-power-mode check block.

Fixes: f81455b2d332 ("drm: bridge: anx7625: implement minimal Type-C support")
Reported-by: Salendarsingh Gaud <sgaud@qti.qualcomm.com>
Signed-off-by: Arpit Saini <arpit.saini@oss.qualcomm.com>
---
 drivers/gpu/drm/bridge/analogix/anx7625.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.c b/drivers/gpu/drm/bridge/analogix/anx7625.c
index c3af88e14f8b..00f2132c7c47 100644
--- a/drivers/gpu/drm/bridge/analogix/anx7625.c
+++ b/drivers/gpu/drm/bridge/analogix/anx7625.c
@@ -2930,11 +2930,11 @@ static int anx7625_i2c_probe(struct i2c_client *client)
 
 		pm_runtime_get_sync(dev);
 		_anx7625_hpd_polling(platform, 5000 * 100);
-	}
 
-	if (platform->pdata.intp_irq)
-		anx7625_reg_write(platform, platform->i2c.rx_p0_client,
-				  INTERFACE_CHANGE_INT_MASK, 0);
+		if (platform->pdata.intp_irq)
+			anx7625_reg_write(platform, platform->i2c.rx_p0_client,
+					  INTERFACE_CHANGE_INT_MASK, 0);
+	}
 
 	/* After getting runtime handle */
 	ret = anx7625_typec_register(platform);

---
base-commit: 3d7783543c2646af69ad65825e810060494bea21
change-id: 20260924-latest_tag-08eace5dd80a

Best regards,
-- 
Arpit Saini <arpit.saini@oss.qualcomm.com>