When the cw parameter equals with the last codeword, the
qcom_spi_config_single_cw_page_read() function configures
the read location last registers. However it completely
misses configuring the regular read location registers
for other codewords.

Change the function to always configure the registers
corresponding to the actual codeword.

While at it, also drop the single-use 'reg' and 'num_cw'
local variables from the function and use the respective
values directly in order to make the code easier to
understand.

Fixes: 7304d1909080 ("spi: spi-qpic: add driver for QCOM SPI NAND flash Interface")
Signed-off-by: Gabor Juhos <j4g8y7@gmail.com>
---
Durig writing the previous patch [1], I have missed the fact, that the
qcom_spi_config_single_cw_page_read() is also broken although in a slightly
different way. So this went to be a standalone patch.

Link: https://lore.kernel.org/r/20260922-qpic-snand-fix-cw_read-readloc-v1-1-67f6819fb3d7@gmail.com # [1]
---
 drivers/spi/spi-qpic-snand.c | 15 +++++++++------
 1 file changed, 9 insertions(+), 6 deletions(-)

diff --git a/drivers/spi/spi-qpic-snand.c b/drivers/spi/spi-qpic-snand.c
index 05efe6313b7f..32bac31b5f00 100644
--- a/drivers/spi/spi-qpic-snand.c
+++ b/drivers/spi/spi-qpic-snand.c
@@ -560,8 +560,6 @@ static int qcom_spi_block_erase(struct qcom_nand_controller *snandc)
 static void qcom_spi_config_single_cw_page_read(struct qcom_nand_controller *snandc,
 						bool use_ecc, int cw)
 {
-	__le32 *reg = &snandc->regs->read_location0;
-	int num_cw = snandc->qspi->num_cw;
 
 	qcom_write_reg_dma(snandc, &snandc->regs->addr0, NAND_ADDR0, 2, 0);
 	qcom_write_reg_dma(snandc, &snandc->regs->cfg0, NAND_DEV0_CFG0, 3, 0);
@@ -571,10 +569,15 @@ static void qcom_spi_config_single_cw_page_read(struct qcom_nand_controller *sna
 			   NAND_ERASED_CW_DETECT_CFG, 1,
 			   NAND_ERASED_CW_SET | NAND_BAM_NEXT_SGL);
 
-	if (cw == (num_cw - 1)) {
-		reg = &snandc->regs->read_location_last0;
-		qcom_write_reg_dma(snandc, reg, NAND_READ_LOCATION_LAST_CW_0, 4, NAND_BAM_NEXT_SGL);
-	}
+	if (cw == (snandc->qspi->num_cw - 1))
+		qcom_write_reg_dma(snandc, &snandc->regs->read_location_last0,
+				   NAND_READ_LOCATION_LAST_CW_0, 4,
+				   NAND_BAM_NEXT_SGL);
+	else
+		qcom_write_reg_dma(snandc, &snandc->regs->read_location0,
+				   NAND_READ_LOCATION_0, 4,
+				   NAND_BAM_NEXT_SGL);
+
 	qcom_write_reg_dma(snandc, &snandc->regs->cmd, NAND_FLASH_CMD, 1, NAND_BAM_NEXT_SGL);
 	qcom_write_reg_dma(snandc, &snandc->regs->exec, NAND_EXEC_CMD, 1, NAND_BAM_NEXT_SGL);
 

---
base-commit: 3d743adf090cd4c9a2120c1e02b0482e88aa0d2d
change-id: 20260922-qpic-snand-fix-singlecw-readloc-c4c89b4369f5

Best regards,
-- 
Gabor Juhos <j4g8y7@gmail.com>