This series adds USB, NSS, and clock-related updates for several
Qualcomm IPQ SoCs, including:
- Configure the USB UTMI reference clock to 24 MHz on IPQ5018,
IPQ5210, and IPQ5332 to fix USB enumeration issues.
- Wire the USB3 PHY PIPE clocks to GCC on IPQ5424 and IPQ9574.
- Add NSS MEMNOC clocks and corresponding clock and ICC IDs for
IPQ5424.
- Connect the IPQ5424 PPE clock to GCC and document the required
clock input ordering.
- Add UNIPHY XPCS reset definitions required for NSS support on
IPQ5210.
- Fix IPA-related typos in the IPQ5424 APSS clock driver.
Signed-off-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com>
---
Kathiravan Thirumoorthy (11):
clk: qcom: ipq5018: add 24MHz rate for USB UTMI clock
clk: qcom: ipq5332: add 24MHz rate for USB UTMI clock
clk: qcom: ipq5210: add 24MHz rate for USB UTMI clock
arm64: dts: qcom: ipq9574: Wire up USB3 PHY PIPE clock to GCC
dt-bindings: clock: qcom: ipq5332-gcc: Describe clock inputs per compatible
arm64: dts: qcom: ipq5424: Wire up USB3 PHY PIPE clock to GCC
dt-bindings: qcom,ipq5424: add NSS MEMNOC clock and ICC IDs
clk: qcom: gcc-ipq5424: add the MEMNOC clocks needed for the NSS block
arm64: dts: qcom: ipq5424: Wire up PPE clock to GCC
clk: qcom: gcc-ipq5210: add UNIPHY XPCS reset entries
clk: qcom: apss-ipq5424: fix 'ipa' typos
.../bindings/clock/qcom,ipq5332-gcc.yaml | 26 +++---
arch/arm64/boot/dts/qcom/ipq5424.dtsi | 3 +-
arch/arm64/boot/dts/qcom/ipq9574.dtsi | 2 +-
drivers/clk/qcom/apss-ipq5424.c | 10 +--
drivers/clk/qcom/gcc-ipq5018.c | 1 +
drivers/clk/qcom/gcc-ipq5210.c | 4 +
drivers/clk/qcom/gcc-ipq5332.c | 1 +
drivers/clk/qcom/gcc-ipq5424.c | 93 ++++++++++++++++++++++
include/dt-bindings/clock/qcom,ipq5424-gcc.h | 4 +
include/dt-bindings/interconnect/qcom,ipq5424.h | 4 +
10 files changed, 131 insertions(+), 17 deletions(-)
---
base-commit: 3f2425f5b5bbbdd991ca9cdfd5502e68d8895998
change-id: 20260825-ipq_clk_changes-f12f06219193
Best regards,
--
Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com>