JHB100 is a Starfive new RISC-V SoC for datacenter BMC (BaseBoard
Managent Controller). Similar with Aspeed 27x0.
The JHB100 basic driver upstream is in progress:
https://patchwork.kernel.org/project/linux-riscv/cover/20260910100357.130134-1-changhuang.liang@starfivetech.com/
JHB100 BMC soc contains Synopsys dwc3 multi-port host controller.
And export its xhci controller to host server through PCIe. xhci
contains 8 ports and each connect with one dwc3 device controller
through an PHY adapter. Server host USB subsystem includes
one multi-port dwc3 USB host, multiple dwc3 device controllers
and their adapters.
The simple arch graph is below.
|-----------------------------------------
|Server PCIe field |
|(usb xhci working in server but it |
| located in BMC soc) |
| -------------------------------- |
| | multi-port xhci controller| |
| | ..... port7 port8 | |
| --------------------^-----^----- |
------------------------|-----|-----------
------------------------|-----|-----------
| ..... --------- --------- |
| |adapter| |adapter| |
| -----^--- -----^--- |
| | | |
| ------------ ------------|
| ...... | device | |device ||
| |controller| |controller||
| ------------ ------------|
| BMC field |
------------------------------------------
The patch base on kernel v7.3-rc1
Minda Chen (3):
dt-bindings: usb: dwc3: Add JHB100 device controller PHY adapter
dt-bindings: usb: dwc3: Add JHB100 USB device clock number limit
usb: dwc3-generic: Add Starfive JHB100 USB 2.0 device controller and
adapter
.../bindings/usb/starfive,jhb100-dwc3.yaml | 13 ++++-
drivers/usb/dwc3/dwc3-generic-plat.c | 47 ++++++++++++++++++-
2 files changed, 58 insertions(+), 2 deletions(-)
base-commit: 89a312991dc6e638a36adc43ccb91dbc25504c04
--
2.17.1