This series adds support for exposing the device-side timestamp provided
by the MHI TSC Timesync capability as a PTP Hardware Clock (PHC).
The series introduces an MHI PHC driver that registers a PTP clock and
uses the TSC Timesync capability to retrieve device timestamps. These
timestamps are exposed through the Linux PTP framework, enabling host
and device clock correlation using standard userspace PTP interfaces.
To support efficient timestamp retrieval, the series also adds generic
64-bit MHI register access support and capability discovery APIs used by
the PHC driver.
The following diagram illustrates the architecture and data flow:
+---------------+ +----------------------+ +----------------+
| Userspace App | | Kernel PTP framework | | MHI PHC Driver |
+---------------+ +----------------------+ +----------------+
|
v
+--------------------+
| Endpoint Device |
| (Timestamp source) |
+--------------------+
- User space applications use the standard Linux PTP interface.
- The PTP subsystem routes IOCTLs to the MHI PHC driver.
- The PHC driver communicates with the MHI device to get the time data.
Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
---
Changes in v3:
- Use mutex instead of spinlock & couple of nits (Jie).
- Move all tsc timesync to mhi_phc.c (Mani). Moved the init part also as
it is easy to control from controller without mhi core dependency.
- Couple of nits & de-register ptp driver in case of syserror and enable
back in mission mode (Mani)
- use PTP_SYS_OFFSET_EXTENDED to read multiple samples and also support
multiple clock ids by using ptp_read_system_prets & ptp_read_system_postts (Vadim Fedorenko)
- Link to v2: https://lore.kernel.org/r/20260411-tsc_timesync-v2-0-6f25f72987b3@oss.qualcomm.com
Changes in V2:
- Rebases to the latest code.
- Patch 1 (bus: mhi: host: Add support to read MHI capabilities) which
is dependent change was brought it here as the series which this patch
is part need to re-designed and will take time https://lore.kernel.org/all/CAFEp6-0ik4B20cRyid9w0f+UgibGciPof9HCWTJ=uBOPvHG35Q@mail.gmail.com/.
- Link to v1: https://lore.kernel.org/all/20250818-tsc_time_sync-v1-0-2747710693ba@oss.qualcomm.com/
---
Krishna Chaitanya Chundru (5):
bus: mhi: host: mhi_phc: Add support for PHC over MHI
bus: mhi: host: Add support for 64bit register reads and writes
bus: mhi: pci_generic: Add support for 64 bit register read & write
bus: mhi: host: Export mhi_read_reg
bus: mhi: host: mhi_phc: Update the Time sync logic to read 64 bit register value
Vivek Pernamitta (1):
bus: mhi: host: Add support to read MHI capabilities
drivers/bus/mhi/common.h | 15 ++++
drivers/bus/mhi/host/Kconfig | 9 +++
drivers/bus/mhi/host/Makefile | 2 +
drivers/bus/mhi/host/init.c | 65 +++++++++++++++
drivers/bus/mhi/host/internal.h | 35 ++++++++
drivers/bus/mhi/host/main.c | 14 ++++
drivers/bus/mhi/host/mhi_phc.c | 161 +++++++++++++++++++++++++++++++++++++
drivers/bus/mhi/host/mhi_phc.h | 21 +++++
drivers/bus/mhi/host/pci_generic.c | 29 +++++++
include/linux/mhi.h | 11 +++
10 files changed, 362 insertions(+)
---
base-commit: 238650ef6c7c7cca08e032527329424c9fbd70e5
change-id: 20260411-tsc_timesync-f877a0394393
Best regards,
--
Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>