[PATCH net 0/5] net/mlx5: fixes for LAG max_tx_speed update flow

Tariq Toukan posted 5 patches 2 weeks, 1 day ago
drivers/infiniband/hw/mlx5/main.c             |  12 +-
drivers/net/ethernet/mellanox/mlx5/core/dev.c |  20 +++
.../net/ethernet/mellanox/mlx5/core/lag/lag.c | 159 +++++++++++++++---
.../net/ethernet/mellanox/mlx5/core/lag/lag.h |  16 +-
.../ethernet/mellanox/mlx5/core/mlx5_core.h   |   1 +
include/linux/mlx5/device.h                   |   1 +
include/linux/mlx5/driver.h                   |   1 +
7 files changed, 181 insertions(+), 29 deletions(-)
[PATCH net 0/5] net/mlx5: fixes for LAG max_tx_speed update flow
Posted by Tariq Toukan 2 weeks, 1 day ago
Hi,

Commit 50f1d188c580 ("net/mlx5: Propagate LAG effective max_tx_speed to
vports") added a mechanism that computes the aggregated LAG TX speed and
programs it into each vport's max_tx_speed via MODIFY_VPORT_STATE. This
series by Or fixes bugs found in that flow.

The bugs:

1. Down ports were counted into the effective aggregate speed.
   When a port goes down, PTYS eth_proto_oper is not necessary 0.

2. The aggregate was not limited by the NIC's PCIe bandwidth. It was
   taken from the bond speed, which is calculated from PTYS, and PTYS
   is not bounded by the PCI bandwidth of the NIC. FW initializes
   max_tx_speed to the minimum of the port speed and the PCIe
   bandwidth, so modifying it with a value computed by different rules
   changes the meaning of the field rather than updating it.

3. MPESW teardown never reset the vport speeds, leaving stale values
   after teardown.

4. RoCE LAG never told the RDMA layer about speed changes. The NIC is
   considered to be in a bare metal configuration, without a valid or
   enabled eswitch, so there are no VF, SF or PF rep vports to modify
   and no event of speed change was raised.

Patch #1 splits the LAG aggregate speed into an operative and a max
        helper, so that each can filter on port state on its own.

Patch #2 resets the vport speed on MPESW teardown.

Patch #3 caches the TX-enabled aggregate speed and programs that into
        the vports, instead of reading it back from the bond netdev.

Patch #4 limits the aggregated TX speed by the NIC's PCIe bandwidth.

Patch #5 notifies the RDMA layer of RoCE LAG speed changes via a new
        driver event.

Regards,
Tariq

Or Har-Toov (5):
  net/mlx5: Lag, split aggregate speed into oper and max helpers
  net/mlx5: Lag, reset vport speed on teardown
  {RDMA,net}/mlx5: cache and use TX-enabled aggregate speed for vports
  net/mlx5: Lag, limit aggregated TX speed by PCIe bandwidth
  {RDMA,net}/mlx5: notify RoCE LAG speed change via driver event

 drivers/infiniband/hw/mlx5/main.c             |  12 +-
 drivers/net/ethernet/mellanox/mlx5/core/dev.c |  20 +++
 .../net/ethernet/mellanox/mlx5/core/lag/lag.c | 159 +++++++++++++++---
 .../net/ethernet/mellanox/mlx5/core/lag/lag.h |  16 +-
 .../ethernet/mellanox/mlx5/core/mlx5_core.h   |   1 +
 include/linux/mlx5/device.h                   |   1 +
 include/linux/mlx5/driver.h                   |   1 +
 7 files changed, 181 insertions(+), 29 deletions(-)


base-commit: 00f9fbc12320253bfc576fb7539d860029c82d0f
-- 
2.44.0