A PCI endpoint bus is a devicetree construct that allows a PCI
endpoint (function) to have sub-devices defined that are accessible
in an SoC via the PCI endpoint's BARs.  Such a bus is represented as
a devicetree sub-node for a PCI function having the name "pci-ep-bus".
There can be one or more pci-ep-bus nodes.

A PCI function with a pci-ep-bus devicetree node must also define
"#address-cells", "#size-cells", and "ranges" properties, to specify
how endpoint bus addresses are translated to the PCI parent bus.

An endpoint bus address has three cells; the first indicates which of
the function's BARs the address is associated with, and the other two
specify a 64-bit (2 cell) offset within the BAR's region.

BAR base addresses are determined dynamically by the PCI enumeration
process, so generally it's not possible to include them in a static
devicetree file.  When this addressing scheme was introduced, this
was not a problem because the devicetree content was generated
dynamically--after booting--based on the information (including BAR
addresses) available following PCI enumeration.

It is possible (and in some cases, necessary) to define the devicetree
nodes that represent PCI devices ahead of time, in a statically-defined
devicetree file.  In order to support the PCI endpoint bus model in this
case it is necessary to dynamically update the static devicetree so that
the BAR base addresses assigned during enumeration are reflected in the
endpoint's "ranges" property.

This series implements that dynamic update, leveraging the same code
used to create the "ranges" property when PCI_DYNAMIC_OF_NODES is
enabled.  The first patch makes an argument to of_pci_get_addr_flags()
optional.  The second patch separates the code that dynamically builds
the property value into a helper function, and the last arranges for a
statically-defined devicetree node for a PCI endpoint to have its
"ranges" property updated (if it includes a "pci-ep-bus" sub-node)..

					-Alex

Note: this series is built upon these patches:
  https://lore.kernel.org/lkml/20260908213459.2519059-1-elder@riscstar.com/

The entire series (based on v7.3-rc2 and including those prerequisites)
is available here:
  https://github.com/riscstar/linux/tree/outgoing/dynamic_ranges-v2


Between version 1 and version 2:
- Included the first patch (which was previously posted in a different
  series)
- Modified the last patch so the ranges property is updated only for
  PCI endpoints having at least one "pci-ep-bus" node
- Rebased on v7.3-rc2 (and the prerequisite series)


Version 1 is available here:
  https://lore.kernel.org/lkml/20260813220717.1394644-1-elder@riscstar.com/


Alex Elder (3):
  PCI: of: make a flags argument optional
  PCI: of: introduce of_pci_build_prop_ranges()
  PCI: of: introduce of_pci_update_endpoint_node_ranges()

 drivers/pci/of.c          |  89 ++++++++++++++++++++++---
 drivers/pci/of_property.c | 137 +++++++++++++++++++++++++-------------
 drivers/pci/pci.h         |   1 +
 3 files changed, 173 insertions(+), 54 deletions(-)


base-commit: 857c3561ea9f2c3107b5c6d830d3b3face159cbc
-- 
2.53.0

On 9/9/26 9:19 PM, Alex Elder wrote:
> A PCI endpoint bus is a devicetree construct that allows a PCI
> endpoint (function) to have sub-devices defined that are accessible
> in an SoC via the PCI endpoint's BARs.  Such a bus is represented as
> a devicetree sub-node for a PCI function having the name "pci-ep-bus".
> There can be one or more pci-ep-bus nodes.
> 
> A PCI function with a pci-ep-bus devicetree node must also define
> "#address-cells", "#size-cells", and "ranges" properties, to specify
> how endpoint bus addresses are translated to the PCI parent bus.
> 
> An endpoint bus address has three cells; the first indicates which of
> the function's BARs the address is associated with, and the other two
> specify a 64-bit (2 cell) offset within the BAR's region.
> 
> BAR base addresses are determined dynamically by the PCI enumeration
> process, so generally it's not possible to include them in a static
> devicetree file.  When this addressing scheme was introduced, this
> was not a problem because the devicetree content was generated
> dynamically--after booting--based on the information (including BAR
> addresses) available following PCI enumeration.
> 
> It is possible (and in some cases, necessary) to define the devicetree
> nodes that represent PCI devices ahead of time, in a statically-defined
> devicetree file.  In order to support the PCI endpoint bus model in this
> case it is necessary to dynamically update the static devicetree so that
> the BAR base addresses assigned during enumeration are reflected in the
> endpoint's "ranges" property.
> 
> This series implements that dynamic update, leveraging the same code
> used to create the "ranges" property when PCI_DYNAMIC_OF_NODES is
> enabled.  The first patch makes an argument to of_pci_get_addr_flags()
> optional.  The second patch separates the code that dynamically builds
> the property value into a helper function, and the last arranges for a
> statically-defined devicetree node for a PCI endpoint to have its
> "ranges" property updated (if it includes a "pci-ep-bus" sub-node)..

After some offline discussion, I have decided to slightly
change *when* the "ranges" property will be updated.

The Raspberry Pi RP1 device defines (statically) a ranges
property within the pci-ep-bus it uses.  It maps BAR 1 to
a base address 0x40000000, size 0x00400000 range in its
parent endpoint's PCI address space.

For the original proposal, the ranges property is replaced
for any PCI endpoint devicetree node with a pci-ep-bus subnode.

Instead, I'd like to offer the option of defining a ranges
property that does not get replaced.  This way, the Raspberry
Pi RP1 can continue to work as it does now.

An "empty" (no value) ranges property doesn't work for
pci-ep-bus, because it will treat the upper cell of the
parent base address as a PCI flags field; pci-ep-bus
instead uses that cell as a BAR number.

So I will be posting a new version of this series that differs
this way:
- In of_pci_make_dev_node(), if there is no existing device
   tree node:  no change (create a complete node dynamically)
- If there is a preexisting devicetree node but the current
   device is a PCI bridge:  no change (just return)
- If the device node in of_pci_make_dev_node() is not a bridge,
   but there is no "pci-ep-bus" child node: no change (just return)

- (New) Look up the ranges property in the devicetree node for
   the PCI endpoint device.  If it is not "empty" (i.e., if it
   has an assigned value, as would the Raspberry Pi RP1):  just
   return (do not change the ranges property value)

- OTHERWISE (empty or perhaps missing ranges property), call
   of_pci_update_endpoint_node_ranges() to create a new ranges
   property dynamically, which takes into account the assigned
   BAR addresses for the PCI endpoint.

					-Alex

> 					-Alex
> 
> Note: this series is built upon these patches:
>    https://lore.kernel.org/lkml/20260908213459.2519059-1-elder@riscstar.com/
> 
> The entire series (based on v7.3-rc2 and including those prerequisites)
> is available here:
>    https://github.com/riscstar/linux/tree/outgoing/dynamic_ranges-v2
> 
> 
> Between version 1 and version 2:
> - Included the first patch (which was previously posted in a different
>    series)
> - Modified the last patch so the ranges property is updated only for
>    PCI endpoints having at least one "pci-ep-bus" node
> - Rebased on v7.3-rc2 (and the prerequisite series)
> 
> 
> Version 1 is available here:
>    https://lore.kernel.org/lkml/20260813220717.1394644-1-elder@riscstar.com/
> 
> 
> Alex Elder (3):
>    PCI: of: make a flags argument optional
>    PCI: of: introduce of_pci_build_prop_ranges()
>    PCI: of: introduce of_pci_update_endpoint_node_ranges()
> 
>   drivers/pci/of.c          |  89 ++++++++++++++++++++++---
>   drivers/pci/of_property.c | 137 +++++++++++++++++++++++++-------------
>   drivers/pci/pci.h         |   1 +
>   3 files changed, 173 insertions(+), 54 deletions(-)
> 
> 
> base-commit: 857c3561ea9f2c3107b5c6d830d3b3face159cbc

On 9/9/26 9:19 PM, Alex Elder wrote:
> A PCI endpoint bus is a devicetree construct that allows a PCI
> endpoint (function) to have sub-devices defined that are accessible
> in an SoC via the PCI endpoint's BARs.  Such a bus is represented as
> a devicetree sub-node for a PCI function having the name "pci-ep-bus".
> There can be one or more pci-ep-bus nodes.

Does anyone have any questions about this?

The devicetree pci-ep-bus mechanism defines one or more buses
under a PCI endpoint function node (either one per BAR, or one
node representing more than one BAR).  Being a bus, it depends on
ranges properties to translate between the local (BAR) address
space and the parent (PCI) address space.

If a devicetree node is predefined (as is the case for the Toshiba
TC9564 SoC), it cannot correctly define an endpoint's ranges
property, because the PCI address space is determined dynamically
during the PCI enumeration process.

This series addresses that by replacing the PCI function's
devicetree ranges property at runtime, to reflect each BAR's
assigned addresses.

There exist other users of the pci-ep-bus, and in particular
the LAN966x driver generates an entire devicetree node to
represent the PCI endpoint function--including dynamically
generating this ranges property.

This series intentionally reuses the code that generates
the ranges property for the "fully dynamic" case used for
LAN966x.

This series (or another doing something comparable) is
required for the TC9564 SoC to function using pci-ep-bus.

					-Alex


> 
> A PCI function with a pci-ep-bus devicetree node must also define
> "#address-cells", "#size-cells", and "ranges" properties, to specify
> how endpoint bus addresses are translated to the PCI parent bus.
> 
> An endpoint bus address has three cells; the first indicates which of
> the function's BARs the address is associated with, and the other two
> specify a 64-bit (2 cell) offset within the BAR's region.
> 
> BAR base addresses are determined dynamically by the PCI enumeration
> process, so generally it's not possible to include them in a static
> devicetree file.  When this addressing scheme was introduced, this
> was not a problem because the devicetree content was generated
> dynamically--after booting--based on the information (including BAR
> addresses) available following PCI enumeration.
> 
> It is possible (and in some cases, necessary) to define the devicetree
> nodes that represent PCI devices ahead of time, in a statically-defined
> devicetree file.  In order to support the PCI endpoint bus model in this
> case it is necessary to dynamically update the static devicetree so that
> the BAR base addresses assigned during enumeration are reflected in the
> endpoint's "ranges" property.
> 
> This series implements that dynamic update, leveraging the same code
> used to create the "ranges" property when PCI_DYNAMIC_OF_NODES is
> enabled.  The first patch makes an argument to of_pci_get_addr_flags()
> optional.  The second patch separates the code that dynamically builds
> the property value into a helper function, and the last arranges for a
> statically-defined devicetree node for a PCI endpoint to have its
> "ranges" property updated (if it includes a "pci-ep-bus" sub-node)..
> 
> 					-Alex
> 
> Note: this series is built upon these patches:
>    https://lore.kernel.org/lkml/20260908213459.2519059-1-elder@riscstar.com/
> 
> The entire series (based on v7.3-rc2 and including those prerequisites)
> is available here:
>    https://github.com/riscstar/linux/tree/outgoing/dynamic_ranges-v2
> 
> 
> Between version 1 and version 2:
> - Included the first patch (which was previously posted in a different
>    series)
> - Modified the last patch so the ranges property is updated only for
>    PCI endpoints having at least one "pci-ep-bus" node
> - Rebased on v7.3-rc2 (and the prerequisite series)
> 
> 
> Version 1 is available here:
>    https://lore.kernel.org/lkml/20260813220717.1394644-1-elder@riscstar.com/
> 
> 
> Alex Elder (3):
>    PCI: of: make a flags argument optional
>    PCI: of: introduce of_pci_build_prop_ranges()
>    PCI: of: introduce of_pci_update_endpoint_node_ranges()
> 
>   drivers/pci/of.c          |  89 ++++++++++++++++++++++---
>   drivers/pci/of_property.c | 137 +++++++++++++++++++++++++-------------
>   drivers/pci/pci.h         |   1 +
>   3 files changed, 173 insertions(+), 54 deletions(-)
> 
> 
> base-commit: 857c3561ea9f2c3107b5c6d830d3b3face159cbc