[PATCH] spi: spi-qpic-snand: avoid writing QPIC_EBI2_ECC_BUF_CFG register

Gabor Juhos posted 1 patch 2 weeks, 2 days ago
drivers/spi/spi-qpic-snand.c | 4 ----
1 file changed, 4 deletions(-)
[PATCH] spi: spi-qpic-snand: avoid writing QPIC_EBI2_ECC_BUF_CFG register
Posted by Gabor Juhos 2 weeks, 2 days ago
The description of commit bfb34eced559 ("mtd: rawnand: qcom: avoid writing
to obsolete register") says this:

  "QPIC_EBI2_ECC_BUF_CFG register got obsolete from QPIC V2.0 onwards.
  Avoid writing this register if QPIC version is V2.0 or newer."

Although the referenced commit is related to the 'qcom-nandc' driver,
however the hardware supported by the current driver is also based on
QPIC v2.0 so we should avoid writing that register here as well.

Remove the register writing code to avoid undefined behaviour.

Fixes: 7304d1909080 ("spi: spi-qpic: add driver for QCOM SPI NAND flash Interface")
Signed-off-by: Gabor Juhos <j4g8y7@gmail.com>
---
 drivers/spi/spi-qpic-snand.c | 4 ----
 1 file changed, 4 deletions(-)

diff --git a/drivers/spi/spi-qpic-snand.c b/drivers/spi/spi-qpic-snand.c
index 61b1f2eb19ce..05efe6313b7f 100644
--- a/drivers/spi/spi-qpic-snand.c
+++ b/drivers/spi/spi-qpic-snand.c
@@ -765,8 +765,6 @@ static int qcom_spi_read_cw_raw(struct qcom_nand_controller *snandc, u8 *data_bu
 
 	qcom_write_reg_dma(snandc, &snandc->regs->addr0, NAND_ADDR0, 2, 0);
 	qcom_write_reg_dma(snandc, &snandc->regs->cfg0, NAND_DEV0_CFG0, 3, 0);
-	qcom_write_reg_dma(snandc, &snandc->regs->ecc_buf_cfg, NAND_EBI2_ECC_BUF_CFG, 1, 0);
-
 	qcom_write_reg_dma(snandc, &snandc->regs->erased_cw_detect_cfg_clr,
 			   NAND_ERASED_CW_DETECT_CFG, 1, 0);
 	qcom_write_reg_dma(snandc, &snandc->regs->erased_cw_detect_cfg_set,
@@ -1104,8 +1102,6 @@ static void qcom_spi_config_page_write(struct qcom_nand_controller *snandc)
 {
 	qcom_write_reg_dma(snandc, &snandc->regs->addr0, NAND_ADDR0, 2, 0);
 	qcom_write_reg_dma(snandc, &snandc->regs->cfg0, NAND_DEV0_CFG0, 3, 0);
-	qcom_write_reg_dma(snandc, &snandc->regs->ecc_buf_cfg, NAND_EBI2_ECC_BUF_CFG,
-			   1, NAND_BAM_NEXT_SGL);
 }
 
 static void qcom_spi_config_cw_write(struct qcom_nand_controller *snandc)

---
base-commit: cb2ad3c020579bf51fb0d702db9cf64af9698377
change-id: 20260909-qpic-snand-avoid-ebi2-reg-write-0920452b4b3b

Best regards,
-- 
Gabor Juhos <j4g8y7@gmail.com>
Re: [PATCH] spi: spi-qpic-snand: avoid writing QPIC_EBI2_ECC_BUF_CFG register
Posted by Mark Brown 1 week, 4 days ago
On Wed, 09 Sep 2026 16:08:25 +0200, Gabor Juhos wrote:
> spi: spi-qpic-snand: avoid writing QPIC_EBI2_ECC_BUF_CFG register

Applied to

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-7.3

Thanks!

[1/1] spi: spi-qpic-snand: avoid writing QPIC_EBI2_ECC_BUF_CFG register
      https://git.kernel.org/broonie/spi/c/930a7312c946

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark
Re: [PATCH] spi: spi-qpic-snand: avoid writing QPIC_EBI2_ECC_BUF_CFG register
Posted by Md Sadre Alam 2 weeks, 1 day ago

On 9/9/2026 7:38 PM, Gabor Juhos wrote:
> The description of commit bfb34eced559 ("mtd: rawnand: qcom: avoid writing
> to obsolete register") says this:
> 
>    "QPIC_EBI2_ECC_BUF_CFG register got obsolete from QPIC V2.0 onwards.
>    Avoid writing this register if QPIC version is V2.0 or newer."
> 
> Although the referenced commit is related to the 'qcom-nandc' driver,
> however the hardware supported by the current driver is also based on
> QPIC v2.0 so we should avoid writing that register here as well.
> 
> Remove the register writing code to avoid undefined behaviour.
> 
> Fixes: 7304d1909080 ("spi: spi-qpic: add driver for QCOM SPI NAND flash Interface")
> Signed-off-by: Gabor Juhos <j4g8y7@gmail.com>
> ---
>   drivers/spi/spi-qpic-snand.c | 4 ----
>   1 file changed, 4 deletions(-)
> 
> diff --git a/drivers/spi/spi-qpic-snand.c b/drivers/spi/spi-qpic-snand.c
> index 61b1f2eb19ce..05efe6313b7f 100644
> --- a/drivers/spi/spi-qpic-snand.c
> +++ b/drivers/spi/spi-qpic-snand.c
> @@ -765,8 +765,6 @@ static int qcom_spi_read_cw_raw(struct qcom_nand_controller *snandc, u8 *data_bu
>   
>   	qcom_write_reg_dma(snandc, &snandc->regs->addr0, NAND_ADDR0, 2, 0);
>   	qcom_write_reg_dma(snandc, &snandc->regs->cfg0, NAND_DEV0_CFG0, 3, 0);
> -	qcom_write_reg_dma(snandc, &snandc->regs->ecc_buf_cfg, NAND_EBI2_ECC_BUF_CFG, 1, 0);
> -
>   	qcom_write_reg_dma(snandc, &snandc->regs->erased_cw_detect_cfg_clr,
>   			   NAND_ERASED_CW_DETECT_CFG, 1, 0);
>   	qcom_write_reg_dma(snandc, &snandc->regs->erased_cw_detect_cfg_set,
> @@ -1104,8 +1102,6 @@ static void qcom_spi_config_page_write(struct qcom_nand_controller *snandc)
>   {
>   	qcom_write_reg_dma(snandc, &snandc->regs->addr0, NAND_ADDR0, 2, 0);
>   	qcom_write_reg_dma(snandc, &snandc->regs->cfg0, NAND_DEV0_CFG0, 3, 0);
> -	qcom_write_reg_dma(snandc, &snandc->regs->ecc_buf_cfg, NAND_EBI2_ECC_BUF_CFG,
> -			   1, NAND_BAM_NEXT_SGL);
>   }
>   
>   static void qcom_spi_config_cw_write(struct qcom_nand_controller *snandc)
> 
> ---
> base-commit: cb2ad3c020579bf51fb0d702db9cf64af9698377
> change-id: 20260909-qpic-snand-avoid-ebi2-reg-write-0920452b4b3b
> 
> Best regards,

Reviewed-by: Md Sadre Alam <md.alam@oss.qualcomm.com>