[PATCH v2 0/2] Fix for storage corruption w/ AMD IOMMU on 64-bit addressing

Mario Limonciello posted 2 patches 2 weeks, 3 days ago
arch/x86/pci/fixup.c | 99 ++++++++++++++++++++++++++++++++++++++++++++
drivers/ata/ahci.c   | 18 --------
2 files changed, 99 insertions(+), 18 deletions(-)
[PATCH v2 0/2] Fix for storage corruption w/ AMD IOMMU on 64-bit addressing
Posted by Mario Limonciello 2 weeks, 3 days ago
An issue has been reported by a number of people that corruption
was occurring on storage for desktop systems.  It's notably reported
on SATA, but the same issue also appears on NVME.

At a glance it looks like an IOMMU issue as turning off the IOMMU helps
the issue, but it's actually a problem that occurs specifically with any
IOVA addressed >58 bits.

This is because the BIOS on these systems is enabling a feature of the
root port called 'enhanced atomics' which repurposes those upper 5 bits
of address space.  That feature should only be enabled by the BIOS when
the partner device supports it, but it's instead needlessly enabled on a
number of root ports.

As some of these systems probably won't receive BIOS updates and there is
active reports of data corruption root caused to this add a quirk to
disable it on affected models, and also remove the quirk that was
introduced to work around this issue in drivers/ata.

v2:
 *  Added resume fixups for the affected AMD PCIe ports

Mario Limonciello (2):
  x86/PCI: Disable enhanced atomics on some AMD PCIe ports
  Revert "ata: ahci: force 32-bit DMA for JMicron JMB582/JMB585"

 arch/x86/pci/fixup.c | 99 ++++++++++++++++++++++++++++++++++++++++++++
 drivers/ata/ahci.c   | 18 --------
 2 files changed, 99 insertions(+), 18 deletions(-)

-- 
2.43.0
Re: [PATCH v2 0/2] Fix for storage corruption w/ AMD IOMMU on 64-bit addressing
Posted by Bjorn Helgaas 2 days, 1 hour ago
On Tue, Sep 08, 2026 at 02:05:58PM -0500, Mario Limonciello wrote:
> An issue has been reported by a number of people that corruption
> was occurring on storage for desktop systems.  It's notably reported
> on SATA, but the same issue also appears on NVME.
> 
> At a glance it looks like an IOMMU issue as turning off the IOMMU helps
> the issue, but it's actually a problem that occurs specifically with any
> IOVA addressed >58 bits.
> 
> This is because the BIOS on these systems is enabling a feature of the
> root port called 'enhanced atomics' which repurposes those upper 5 bits
> of address space.  That feature should only be enabled by the BIOS when
> the partner device supports it, but it's instead needlessly enabled on a
> number of root ports.
> 
> As some of these systems probably won't receive BIOS updates and there is
> active reports of data corruption root caused to this add a quirk to
> disable it on affected models, and also remove the quirk that was
> introduced to work around this issue in drivers/ata.
> 
> v2:
>  *  Added resume fixups for the affected AMD PCIe ports
> 
> Mario Limonciello (2):
>   x86/PCI: Disable enhanced atomics on some AMD PCIe ports
>   Revert "ata: ahci: force 32-bit DMA for JMicron JMB582/JMB585"
> 
>  arch/x86/pci/fixup.c | 99 ++++++++++++++++++++++++++++++++++++++++++++
>  drivers/ata/ahci.c   | 18 --------
>  2 files changed, 99 insertions(+), 18 deletions(-)

Applied to pci/for-linus for v7.3, thanks!
Re: [PATCH v2 0/2] Fix for storage corruption w/ AMD IOMMU on 64-bit addressing
Posted by Mario Limonciello 2 days, 1 hour ago

On 9/23/26 13:36, Bjorn Helgaas wrote:
> On Tue, Sep 08, 2026 at 02:05:58PM -0500, Mario Limonciello wrote:
>> An issue has been reported by a number of people that corruption
>> was occurring on storage for desktop systems.  It's notably reported
>> on SATA, but the same issue also appears on NVME.
>>
>> At a glance it looks like an IOMMU issue as turning off the IOMMU helps
>> the issue, but it's actually a problem that occurs specifically with any
>> IOVA addressed >58 bits.
>>
>> This is because the BIOS on these systems is enabling a feature of the
>> root port called 'enhanced atomics' which repurposes those upper 5 bits
>> of address space.  That feature should only be enabled by the BIOS when
>> the partner device supports it, but it's instead needlessly enabled on a
>> number of root ports.
>>
>> As some of these systems probably won't receive BIOS updates and there is
>> active reports of data corruption root caused to this add a quirk to
>> disable it on affected models, and also remove the quirk that was
>> introduced to work around this issue in drivers/ata.
>>
>> v2:
>>   *  Added resume fixups for the affected AMD PCIe ports
>>
>> Mario Limonciello (2):
>>    x86/PCI: Disable enhanced atomics on some AMD PCIe ports
>>    Revert "ata: ahci: force 32-bit DMA for JMicron JMB582/JMB585"
>>
>>   arch/x86/pci/fixup.c | 99 ++++++++++++++++++++++++++++++++++++++++++++
>>   drivers/ata/ahci.c   | 18 --------
>>   2 files changed, 99 insertions(+), 18 deletions(-)
> 
> Applied to pci/for-linus for v7.3, thanks!

Thanks!  Could you add to the commits:

Cc: stable@vger.kernel.org

We should take this back to any non EoL kernel as well.
Re: [PATCH v2 0/2] Fix for storage corruption w/ AMD IOMMU on 64-bit addressing
Posted by Bjorn Helgaas 2 days, 1 hour ago
On Wed, Sep 23, 2026 at 01:39:46PM -0500, Mario Limonciello wrote:
> On 9/23/26 13:36, Bjorn Helgaas wrote:
> > On Tue, Sep 08, 2026 at 02:05:58PM -0500, Mario Limonciello wrote:
> > > An issue has been reported by a number of people that corruption
> > > was occurring on storage for desktop systems.  It's notably reported
> > > on SATA, but the same issue also appears on NVME.
> > > 
> > > At a glance it looks like an IOMMU issue as turning off the IOMMU helps
> > > the issue, but it's actually a problem that occurs specifically with any
> > > IOVA addressed >58 bits.
> > > 
> > > This is because the BIOS on these systems is enabling a feature of the
> > > root port called 'enhanced atomics' which repurposes those upper 5 bits
> > > of address space.  That feature should only be enabled by the BIOS when
> > > the partner device supports it, but it's instead needlessly enabled on a
> > > number of root ports.
> > > 
> > > As some of these systems probably won't receive BIOS updates and there is
> > > active reports of data corruption root caused to this add a quirk to
> > > disable it on affected models, and also remove the quirk that was
> > > introduced to work around this issue in drivers/ata.
> > > 
> > > v2:
> > >   *  Added resume fixups for the affected AMD PCIe ports
> > > 
> > > Mario Limonciello (2):
> > >    x86/PCI: Disable enhanced atomics on some AMD PCIe ports
> > >    Revert "ata: ahci: force 32-bit DMA for JMicron JMB582/JMB585"
> > > 
> > >   arch/x86/pci/fixup.c | 99 ++++++++++++++++++++++++++++++++++++++++++++
> > >   drivers/ata/ahci.c   | 18 --------
> > >   2 files changed, 99 insertions(+), 18 deletions(-)
> > 
> > Applied to pci/for-linus for v7.3, thanks!
> 
> Thanks!  Could you add to the commits:
> 
> Cc: stable@vger.kernel.org
> 
> We should take this back to any non EoL kernel as well.

Done :)
Re: [PATCH v2 0/2] Fix for storage corruption w/ AMD IOMMU on 64-bit addressing
Posted by Mario Limonciello 4 days, 15 hours ago
On 9/8/26 2:05 PM, Mario Limonciello wrote:
> An issue has been reported by a number of people that corruption
> was occurring on storage for desktop systems.  It's notably reported
> on SATA, but the same issue also appears on NVME.
> 
> At a glance it looks like an IOMMU issue as turning off the IOMMU helps
> the issue, but it's actually a problem that occurs specifically with any
> IOVA addressed >58 bits.
> 
> This is because the BIOS on these systems is enabling a feature of the
> root port called 'enhanced atomics' which repurposes those upper 5 bits
> of address space.  That feature should only be enabled by the BIOS when
> the partner device supports it, but it's instead needlessly enabled on a
> number of root ports.
> 
> As some of these systems probably won't receive BIOS updates and there is
> active reports of data corruption root caused to this add a quirk to
> disable it on affected models, and also remove the quirk that was
> introduced to work around this issue in drivers/ata.
> 
> v2:
>   *  Added resume fixups for the affected AMD PCIe ports
> 
> Mario Limonciello (2):
>    x86/PCI: Disable enhanced atomics on some AMD PCIe ports
>    Revert "ata: ahci: force 32-bit DMA for JMicron JMB582/JMB585"
> 
>   arch/x86/pci/fixup.c | 99 ++++++++++++++++++++++++++++++++++++++++++++
>   drivers/ata/ahci.c   | 18 --------
>   2 files changed, 99 insertions(+), 18 deletions(-)
> 

Gentle ping on this series.
Re: [PATCH v2 0/2] Fix for storage corruption w/ AMD IOMMU on 64-bit addressing
Posted by Mario Limonciello 3 days, 4 hours ago

On 9/20/26 23:52, Mario Limonciello wrote:
> On 9/8/26 2:05 PM, Mario Limonciello wrote:
>> An issue has been reported by a number of people that corruption
>> was occurring on storage for desktop systems.  It's notably reported
>> on SATA, but the same issue also appears on NVME.
>>
>> At a glance it looks like an IOMMU issue as turning off the IOMMU helps
>> the issue, but it's actually a problem that occurs specifically with any
>> IOVA addressed >58 bits.
>>
>> This is because the BIOS on these systems is enabling a feature of the
>> root port called 'enhanced atomics' which repurposes those upper 5 bits
>> of address space.  That feature should only be enabled by the BIOS when
>> the partner device supports it, but it's instead needlessly enabled on a
>> number of root ports.
>>
>> As some of these systems probably won't receive BIOS updates and there is
>> active reports of data corruption root caused to this add a quirk to
>> disable it on affected models, and also remove the quirk that was
>> introduced to work around this issue in drivers/ata.
>>
>> v2:
>>   *  Added resume fixups for the affected AMD PCIe ports
>>
>> Mario Limonciello (2):
>>    x86/PCI: Disable enhanced atomics on some AMD PCIe ports
>>    Revert "ata: ahci: force 32-bit DMA for JMicron JMB582/JMB585"
>>
>>   arch/x86/pci/fixup.c | 99 ++++++++++++++++++++++++++++++++++++++++++++
>>   drivers/ata/ahci.c   | 18 --------
>>   2 files changed, 99 insertions(+), 18 deletions(-)
>>
> 
> Gentle ping on this series.

I didn't include it on the series while we were getting alignment, but 
when committing this should include

Cc: stable@vger.kernel.org

If it needs to spin for any reason, I'll include that on v3.
Re: [PATCH v2 0/2] Fix for storage corruption w/ AMD IOMMU on 64-bit addressing
Posted by Niklas Cassel 3 days, 10 hours ago
On Sun, Sep 20, 2026 at 11:52:08PM -0500, Mario Limonciello wrote:
> On 9/8/26 2:05 PM, Mario Limonciello wrote:
> > An issue has been reported by a number of people that corruption
> > was occurring on storage for desktop systems.  It's notably reported
> > on SATA, but the same issue also appears on NVME.
> > 
> > At a glance it looks like an IOMMU issue as turning off the IOMMU helps
> > the issue, but it's actually a problem that occurs specifically with any
> > IOVA addressed >58 bits.
> > 
> > This is because the BIOS on these systems is enabling a feature of the
> > root port called 'enhanced atomics' which repurposes those upper 5 bits
> > of address space.  That feature should only be enabled by the BIOS when
> > the partner device supports it, but it's instead needlessly enabled on a
> > number of root ports.
> > 
> > As some of these systems probably won't receive BIOS updates and there is
> > active reports of data corruption root caused to this add a quirk to
> > disable it on affected models, and also remove the quirk that was
> > introduced to work around this issue in drivers/ata.
> > 
> > v2:
> >   *  Added resume fixups for the affected AMD PCIe ports
> > 
> > Mario Limonciello (2):
> >    x86/PCI: Disable enhanced atomics on some AMD PCIe ports
> >    Revert "ata: ahci: force 32-bit DMA for JMicron JMB582/JMB585"
> > 
> >   arch/x86/pci/fixup.c | 99 ++++++++++++++++++++++++++++++++++++++++++++
> >   drivers/ata/ahci.c   | 18 --------
> >   2 files changed, 99 insertions(+), 18 deletions(-)
> > 
> 
> Gentle ping on this series.

I can pick up patch 2/2, but want to wait until patch 1/2 has been picked
up either by Bjorn, or one of the x86 maintainers.


Kind regards,
Niklas
Re: [PATCH v2 0/2] Fix for storage corruption w/ AMD IOMMU on 64-bit addressing
Posted by Mario Limonciello 3 days, 9 hours ago
On 9/22/26 04:49, Niklas Cassel wrote:
> On Sun, Sep 20, 2026 at 11:52:08PM -0500, Mario Limonciello wrote:
>> On 9/8/26 2:05 PM, Mario Limonciello wrote:
>>> An issue has been reported by a number of people that corruption
>>> was occurring on storage for desktop systems.  It's notably reported
>>> on SATA, but the same issue also appears on NVME.
>>>
>>> At a glance it looks like an IOMMU issue as turning off the IOMMU helps
>>> the issue, but it's actually a problem that occurs specifically with any
>>> IOVA addressed >58 bits.
>>>
>>> This is because the BIOS on these systems is enabling a feature of the
>>> root port called 'enhanced atomics' which repurposes those upper 5 bits
>>> of address space.  That feature should only be enabled by the BIOS when
>>> the partner device supports it, but it's instead needlessly enabled on a
>>> number of root ports.
>>>
>>> As some of these systems probably won't receive BIOS updates and there is
>>> active reports of data corruption root caused to this add a quirk to
>>> disable it on affected models, and also remove the quirk that was
>>> introduced to work around this issue in drivers/ata.
>>>
>>> v2:
>>>    *  Added resume fixups for the affected AMD PCIe ports
>>>
>>> Mario Limonciello (2):
>>>     x86/PCI: Disable enhanced atomics on some AMD PCIe ports
>>>     Revert "ata: ahci: force 32-bit DMA for JMicron JMB582/JMB585"
>>>
>>>    arch/x86/pci/fixup.c | 99 ++++++++++++++++++++++++++++++++++++++++++++
>>>    drivers/ata/ahci.c   | 18 --------
>>>    2 files changed, 99 insertions(+), 18 deletions(-)
>>>
>>
>> Gentle ping on this series.
> 
> I can pick up patch 2/2, but want to wait until patch 1/2 has been picked
> up either by Bjorn, or one of the x86 maintainers.
> 
> 
> Kind regards,
> Niklas

I think it would be better that this all goes through one tree so we 
don't end up with a situation that someone has the revert but not the fix.

So maybe better to leave an A-b tag on 2/2 and then let pci or tip pick 
up the series.