[PATCH] crypto: hisilicon/zip - enable auto clock gating for DAE

Chenghai Huang posted 1 patch 4 weeks ago
drivers/crypto/hisilicon/zip/dae_main.c | 23 +++++++++++++++++++++--
1 file changed, 21 insertions(+), 2 deletions(-)
[PATCH] crypto: hisilicon/zip - enable auto clock gating for DAE
Posted by Chenghai Huang 4 weeks ago
From: lizhi <lizhi206@huawei.com>

Enable auto clock gating for the DAE module. The clock gating
is enabled after DAE initialization is completed, so the device
can reduce power consumption when idle.

Signed-off-by: lizhi <lizhi206@huawei.com>
Signed-off-by: Chenghai Huang <huangchenghai2@huawei.com>
---
 drivers/crypto/hisilicon/zip/dae_main.c | 23 +++++++++++++++++++++--
 1 file changed, 21 insertions(+), 2 deletions(-)

diff --git a/drivers/crypto/hisilicon/zip/dae_main.c b/drivers/crypto/hisilicon/zip/dae_main.c
index 68aebd02fc84..57ea836a265e 100644
--- a/drivers/crypto/hisilicon/zip/dae_main.c
+++ b/drivers/crypto/hisilicon/zip/dae_main.c
@@ -39,6 +39,8 @@
 #define DAE_AM_RETURN_MASK		0x3
 #define DAE_AXI_CFG_OFFSET		0x331000
 #define DAE_AXI_SHUTDOWN_EN_MASK	(BIT(0) | BIT(5))
+#define DAE_AUTO_CG_EN_OFFSET		0x331070
+#define DAE_AUTO_CG_EN_MASK		(~(BIT_ULL(4) | BIT_ULL(18) | BIT_ULL(19)))
 
 struct hisi_dae_hw_error {
 	u32 int_msk;
@@ -61,6 +63,17 @@ static inline bool dae_is_support(struct hisi_qm *qm)
 	return false;
 }
 
+static void hisi_dae_set_clock_gating(struct hisi_qm *qm, bool enable)
+{
+	if (qm->ver < QM_HW_V5)
+		return;
+
+	if (enable)
+		writeq(DAE_AUTO_CG_EN_MASK, qm->io_base + DAE_AUTO_CG_EN_OFFSET);
+	else
+		writeq(0, qm->io_base + DAE_AUTO_CG_EN_OFFSET);
+}
+
 int hisi_dae_set_user_domain(struct hisi_qm *qm)
 {
 	u32 val;
@@ -69,16 +82,22 @@ int hisi_dae_set_user_domain(struct hisi_qm *qm)
 	if (!dae_is_support(qm))
 		return 0;
 
+	hisi_dae_set_clock_gating(qm, false);
+
 	val = readl(qm->io_base + DAE_MEM_START_OFFSET);
 	val |= DAE_MEM_START_MASK;
 	writel(val, qm->io_base + DAE_MEM_START_OFFSET);
 	ret = readl_relaxed_poll_timeout(qm->io_base + DAE_MEM_DONE_OFFSET, val,
 					 val & DAE_MEM_DONE_MASK,
 					 DAE_REG_RD_INTVRL_US, DAE_REG_RD_TMOUT_US);
-	if (ret)
+	if (ret) {
 		pci_err(qm->pdev, "failed to init dae memory!\n");
+		return ret;
+	}
 
-	return ret;
+	hisi_dae_set_clock_gating(qm, true);
+
+	return 0;
 }
 
 int hisi_dae_set_alg(struct hisi_qm *qm)
-- 
2.43.0
Re: [PATCH] crypto: hisilicon/zip - enable auto clock gating for DAE
Posted by Herbert Xu 2 weeks, 1 day ago
On Sat, Aug 29, 2026 at 05:49:24PM +0800, Chenghai Huang wrote:
> From: lizhi <lizhi206@huawei.com>
> 
> Enable auto clock gating for the DAE module. The clock gating
> is enabled after DAE initialization is completed, so the device
> can reduce power consumption when idle.
> 
> Signed-off-by: lizhi <lizhi206@huawei.com>
> Signed-off-by: Chenghai Huang <huangchenghai2@huawei.com>
> ---
>  drivers/crypto/hisilicon/zip/dae_main.c | 23 +++++++++++++++++++++--
>  1 file changed, 21 insertions(+), 2 deletions(-)

Please review the Sashiko comments:

https://sashiko.dev/#/patchset/20260829094924.2191402-1-huangchenghai2%40huawei.com

Thanks,
-- 
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt