Since UFS_PHY_GDSC was attached to the Inline Crypto Engine and the driver
does not currently do runtime PM, the GDSC remains enabled while the
device is idle, even on boards where there are no consumers.

I'm working on getting runtime PM enabled in the ICE driver, but the
node should not be enabled on such boards anyways.

So disable the Inline Crypto Engine by default in the SoC DTSI and enable
it only in board DTS files that use it.

Do this accross the board, for all SoCs that have dedicated ICE DT node.

Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
---
Abel Vesa (11):
      arm64: dts: qcom: sm8550: Disable Inline Crypto Engine by default
      arm64: dts: qcom: sm8450: Disable Inline Crypto Engine by default
      arm64: dts: qcom: sm8650: Disable Inline Crypto Engine by default
      arm64: dts: qcom: sm8750: Disable Inline Crypto Engine by default
      arm64: dts: qcom: eliza: Disable Inline Crypto Engine by default
      arm64: dts: qcom: kaanapali: Disable Inline Crypto Engine by default
      arm64: dts: qcom: lemans: Disable Inline Crypto Engine by default
      arm64: dts: qcom: milos: Disable Inline Crypto Engine by default
      arm64: dts: qcom: kodiak: Disable Inline Crypto Engine by default
      arm64: dts: qcom: monaco: Disable Inline Crypto Engine by default
      arm64: dts: qcom: sc7180: Disable Inline Crypto Engine by default

 arch/arm64/boot/dts/qcom/eliza-mtp.dts                        | 4 ++++
 arch/arm64/boot/dts/qcom/eliza.dtsi                           | 2 ++
 arch/arm64/boot/dts/qcom/kaanapali-mtp.dts                    | 4 ++++
 arch/arm64/boot/dts/qcom/kaanapali-qrd.dts                    | 4 ++++
 arch/arm64/boot/dts/qcom/kaanapali.dtsi                       | 2 ++
 arch/arm64/boot/dts/qcom/kodiak.dtsi                          | 2 ++
 arch/arm64/boot/dts/qcom/lemans-evk.dts                       | 4 ++++
 arch/arm64/boot/dts/qcom/lemans-ride-common.dtsi              | 4 ++++
 arch/arm64/boot/dts/qcom/lemans.dtsi                          | 2 ++
 arch/arm64/boot/dts/qcom/milos-fairphone-fp6.dts              | 4 ++++
 arch/arm64/boot/dts/qcom/milos.dtsi                           | 2 ++
 arch/arm64/boot/dts/qcom/monaco-evk.dts                       | 4 ++++
 arch/arm64/boot/dts/qcom/monaco.dtsi                          | 2 ++
 arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts            | 4 ++++
 arch/arm64/boot/dts/qcom/qcm6490-idp.dts                      | 4 ++++
 arch/arm64/boot/dts/qcom/qcm6490-particle-tachyon.dts         | 4 ++++
 arch/arm64/boot/dts/qcom/qcm6490-shift-otter.dts              | 4 ++++
 arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts                  | 4 ++++
 arch/arm64/boot/dts/qcom/qcs6490-thundercomm-minipc-g1iot.dts | 4 ++++
 arch/arm64/boot/dts/qcom/qcs6490-thundercomm-rubikpi3.dts     | 4 ++++
 arch/arm64/boot/dts/qcom/qcs8300-ride.dts                     | 4 ++++
 arch/arm64/boot/dts/qcom/qcs8550-aim300.dtsi                  | 4 ++++
 arch/arm64/boot/dts/qcom/qcs8550-rb5gen2.dts                  | 4 ++++
 arch/arm64/boot/dts/qcom/sc7180.dtsi                          | 2 ++
 arch/arm64/boot/dts/qcom/sc7280-idp.dtsi                      | 4 ++++
 arch/arm64/boot/dts/qcom/sm7125-xiaomi-common.dtsi            | 4 ++++
 arch/arm64/boot/dts/qcom/sm7325-motorola-dubai-common.dtsi    | 4 ++++
 arch/arm64/boot/dts/qcom/sm7325-motorola-dubai.dts            | 4 ++++
 arch/arm64/boot/dts/qcom/sm7325-nothing-spacewar.dts          | 4 ++++
 arch/arm64/boot/dts/qcom/sm7325-xiaomi-taoyao.dts             | 4 ++++
 arch/arm64/boot/dts/qcom/sm8450-hdk.dts                       | 4 ++++
 arch/arm64/boot/dts/qcom/sm8450-qrd.dts                       | 4 ++++
 arch/arm64/boot/dts/qcom/sm8450.dtsi                          | 2 ++
 arch/arm64/boot/dts/qcom/sm8550-hdk.dts                       | 4 ++++
 arch/arm64/boot/dts/qcom/sm8550-mtp.dts                       | 4 ++++
 arch/arm64/boot/dts/qcom/sm8550-qrd.dts                       | 4 ++++
 arch/arm64/boot/dts/qcom/sm8550-samsung-q5q.dts               | 4 ++++
 arch/arm64/boot/dts/qcom/sm8550.dtsi                          | 2 ++
 arch/arm64/boot/dts/qcom/sm8650-ayaneo-pocket-s2.dts          | 4 ++++
 arch/arm64/boot/dts/qcom/sm8650-hdk.dts                       | 4 ++++
 arch/arm64/boot/dts/qcom/sm8650-mtp.dts                       | 4 ++++
 arch/arm64/boot/dts/qcom/sm8650-qrd.dts                       | 4 ++++
 arch/arm64/boot/dts/qcom/sm8650.dtsi                          | 2 ++
 arch/arm64/boot/dts/qcom/sm8750-mtp.dts                       | 4 ++++
 arch/arm64/boot/dts/qcom/sm8750-qrd.dts                       | 4 ++++
 arch/arm64/boot/dts/qcom/sm8750.dtsi                          | 2 ++
 46 files changed, 162 insertions(+)
---
base-commit: 3d83758432b5e6ed9507500a57efb0f3af41ee7d
change-id: 20260828-b4-dts-qcom-disable-ice-by-default-4d9cde057a51

Best regards,
--  
Abel Vesa <abel.vesa@oss.qualcomm.com>

On 28-08-2026 18:07, Abel Vesa wrote:
> Since UFS_PHY_GDSC was attached to the Inline Crypto Engine and the driver
> does not currently do runtime PM, the GDSC remains enabled while the
> device is idle, even on boards where there are no consumers.
> 
> I'm working on getting runtime PM enabled in the ICE driver, but the
> node should not be enabled on such boards anyways.
> 
> So disable the Inline Crypto Engine by default in the SoC DTSI and enable
> it only in board DTS files that use it.
> 
> Do this accross the board, for all SoCs that have dedicated ICE DT node.
> 
> Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com>

Kindly check discussion happenend before on adding such implementation.

https://lore.kernel.org/all/56ab63c3-4288-45f7-bfea-d40046437a9f@oss.qualcomm.com/

The idea is to enable ice as default and independent of storage media
and enable runtime PM enabled.

-- 
Regards
Kuldeep

Hi Abel

On 28-08-2026 06:17 pm, Kuldeep Singh wrote:
> 
> 
> On 28-08-2026 18:07, Abel Vesa wrote:
>> Since UFS_PHY_GDSC was attached to the Inline Crypto Engine and the driver
>> does not currently do runtime PM, the GDSC remains enabled while the
>> device is idle, even on boards where there are no consumers.
>>
>> I'm working on getting runtime PM enabled in the ICE driver, but the
>> node should not be enabled on such boards anyways.
>>
>> So disable the Inline Crypto Engine by default in the SoC DTSI and enable
>> it only in board DTS files that use it.
>>
>> Do this accross the board, for all SoCs that have dedicated ICE DT node.
>>
>> Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
> 
> Kindly check discussion happenend before on adding such implementation.
> 
> https://lore.kernel.org/all/56ab63c3-4288-45f7-bfea-d40046437a9f@oss.qualcomm.com/
> 
> The idea is to enable ice as default and independent of storage media
> and enable runtime PM enabled.
> 

I agree with the discussion and Konrad's point on the referenced thread.
It makes more sense to put efforts into runtime PM for ICE instead of disabling it
by default on all SoCs.

This series brings the obvious overhead of having to send patches for every new board
added upstream that requires ICE. Also, once we have runtime PM enabled, we would not
needed these board-specific enablement changes anyways.

Regards,
Harshal

On 26-08-28 18:17:52, Kuldeep Singh wrote:
> 
> 
> On 28-08-2026 18:07, Abel Vesa wrote:
> > Since UFS_PHY_GDSC was attached to the Inline Crypto Engine and the driver
> > does not currently do runtime PM, the GDSC remains enabled while the
> > device is idle, even on boards where there are no consumers.
> > 
> > I'm working on getting runtime PM enabled in the ICE driver, but the
> > node should not be enabled on such boards anyways.
> > 
> > So disable the Inline Crypto Engine by default in the SoC DTSI and enable
> > it only in board DTS files that use it.
> > 
> > Do this accross the board, for all SoCs that have dedicated ICE DT node.
> > 
> > Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
> 
> Kindly check discussion happenend before on adding such implementation.
> 
> https://lore.kernel.org/all/56ab63c3-4288-45f7-bfea-d40046437a9f@oss.qualcomm.com/
> 
> The idea is to enable ice as default and independent of storage media
> and enable runtime PM enabled.

Yeah, just replied to that thread right now.