.../gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.c | 5 +++++ 1 file changed, 5 insertions(+)
get_estimated_bw() divides by link->dpia_bw_alloc_config.bw_granularity,
which is zeroed by reset_bw_alloc_struct() and only populated once
DP_TUNNELING_BW_ALLOC_CAP_CHANGED has been handled.
link_dp_dpia_handle_bw_alloc_status(), the DPCD interrupt handler,
calls get_estimated_bw() whenever DP_TUNNELING_ESTIMATED_BW_CHANGED
is set, independently of whether DP_TUNNELING_BW_ALLOC_CAP_CHANGED
has ever fired for that link. A connected USB4/DPIA tunneling device
that reports an estimated-bandwidth change before ever reporting a
capability change drives a division by zero in this IRQ path.
link_dpia_send_bw_alloc_request() already guards the same
bw_granularity division; add the identical guard here rather than
introducing a new pattern.
Fixes: 8e5cfe547bf3 ("drm/amd/display: upstream link_dp_dpia_bw.c")
Assisted-by: gkh_clanker_t1000
Signed-off-by: Hari Mishal <harimishal1@gmail.com>
---
.../gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.c b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.c
index dd854d992692..f43fc4b78a8d 100644
--- a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.c
+++ b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.c
@@ -103,6 +103,11 @@ static int get_estimated_bw(struct dc_link *link)
{
uint8_t bw_estimated_bw = 0;
+ if (link->dpia_bw_alloc_config.bw_granularity == 0) {
+ DC_LOG_ERROR("%s: BW granularity is zero!\n", __func__);
+ return 0;
+ }
+
core_link_read_dpcd(
link,
ESTIMATED_BW,
--
2.43.0
Weekly promotion tests found no regression.
This patch is
Reviewed-by: Alex Hung <alex.hung@amd.com>
On 8/22/26 08:57, Hari Mishal wrote:
> [Some people who received this message don't often get email from harimishal1@gmail.com. Learn why this is important at https://aka.ms/LearnAboutSenderIdentification ]
>
> get_estimated_bw() divides by link->dpia_bw_alloc_config.bw_granularity,
> which is zeroed by reset_bw_alloc_struct() and only populated once
> DP_TUNNELING_BW_ALLOC_CAP_CHANGED has been handled.
>
> link_dp_dpia_handle_bw_alloc_status(), the DPCD interrupt handler,
> calls get_estimated_bw() whenever DP_TUNNELING_ESTIMATED_BW_CHANGED
> is set, independently of whether DP_TUNNELING_BW_ALLOC_CAP_CHANGED
> has ever fired for that link. A connected USB4/DPIA tunneling device
> that reports an estimated-bandwidth change before ever reporting a
> capability change drives a division by zero in this IRQ path.
>
> link_dpia_send_bw_alloc_request() already guards the same
> bw_granularity division; add the identical guard here rather than
> introducing a new pattern.
>
> Fixes: 8e5cfe547bf3 ("drm/amd/display: upstream link_dp_dpia_bw.c")
> Assisted-by: gkh_clanker_t1000
> Signed-off-by: Hari Mishal <harimishal1@gmail.com>
> ---
> .../gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.c | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.c b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.c
> index dd854d992692..f43fc4b78a8d 100644
> --- a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.c
> +++ b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.c
> @@ -103,6 +103,11 @@ static int get_estimated_bw(struct dc_link *link)
> {
> uint8_t bw_estimated_bw = 0;
>
> + if (link->dpia_bw_alloc_config.bw_granularity == 0) {
> + DC_LOG_ERROR("%s: BW granularity is zero!\n", __func__);
> + return 0;
> + }
> +
> core_link_read_dpcd(
> link,
> ESTIMATED_BW,
> --
> 2.43.0
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