The ADXL367 exposes two independent interrupt output pins, INT1 and INT2,
each with its own event mapping register. The driver has always hardcoded
INT1, so a board that routes only INT2 to the host never receives
interrupts. This series lets the driver pick the interrupt map register
based on the interrupt-names device tree property.
v3 addresses review feedback on the driver patch: the interrupt number
returned by fwnode_irq_get_byname() is now used for the request, so the
requested line always matches the routed INTMAP register even if the
interrupts are listed in an unexpected order. A precursor patch converts
the existing regmap_update_bits(..., en ? mask : 0) helpers to
regmap_assign_bits() as suggested during review.
Changes in v3:
- New precursor patch converting the boolean regmap_update_bits() helpers
to regmap_assign_bits().
- Use the fwnode_irq_get_byname() interrupt number for
devm_request_threaded_irq() in the INT2 patch.
- Rebased on the latest togreg/testing.
Antoniu Miclaus (4):
dt-bindings: iio: update unreachable maintainer entries
dt-bindings: iio: accel: adi,adxl367: add interrupt-names
iio: accel: adxl367: use regmap_assign_bits()
iio: accel: adxl367: add support for INT2 interrupt pin
.../bindings/iio/accel/adi,adxl367.yaml | 13 ++++-
.../bindings/iio/adc/adi,ad4130.yaml | 3 +-
.../bindings/iio/addac/adi,ad74115.yaml | 3 +-
.../bindings/iio/addac/adi,ad74413r.yaml | 3 +-
MAINTAINERS | 4 ++
drivers/iio/accel/adxl367.c | 47 +++++++++++++++----
6 files changed, 60 insertions(+), 13 deletions(-)
base-commit: 350d1fb9204b13c5f95e511e98b8bcb47574d425
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2.43.0