Hi,
This is the first 10 patches from v5, split out following Frank's
suggestion:
https://lore.kernel.org/r/anzgNmxSV2vf1w1X@lizhi-Precision-Tower-5810/
This prep series converts the LL into a reusable circular ring and
prepares the doorbell and IRQ paths for the follow-up series,
"Support dynamic LL appends".
This series is based on dmaengine/next.
Notes
=====
- One temporary limitation caused by this split is that a descriptor must
fit in the usable ring. Patch 4 rejects descriptors that exceed it, and
the follow-up removes this limit once LL progress reclamation is added.
See:
https://lore.kernel.org/all/a62w2vkektwuksvz4oqkozqu27knzsqdroj7xprfm47twz5cs7@rd42oqapg5z2/
Frank and I agreed off-list that this restriction is acceptable because
a single descriptor with roughly 170 or more elements is unusual.
- Although this series does not append requests while a channel is
running, it can still reduce per-transfer overhead by reusing the
circular LL context: the driver no longer rewrites the link element or
re-enables the channel for every descriptor. The follow-up can
additionally avoid some stop/restart gaps by appending while running.
- dw_edma_core_ll_cur_idx() and dw_edma_core_ll_irq_clear() are not used
until the follow-up. They remain here because this is a literal split of
v5 patches 1-10.
Testing with this v6 (split-out prep series)
============================================
I tested this prep series on the following two testbeds:
- eDMA: RK3588 Rock 5B, DWC PCIe v5.60a
- HDMA: SpacemiT K3, DWC PCIe v6.30a [1]
1. fio
The fio setup uses nvmet_pci_epf with a null_blk-backed namespace,
runtime=30s, ramp_time=5s. The "Before" values reuse the baseline
measurements reported with v2. The "After" values are three
consecutive v6 runs.
- eDMA (RK3588)
Summary by group (BW delta %)
all n=26 mean= +4.9 median= +7.1 min= -33.3 max= +36.8
read n=14 mean= +8.4 median= +10.2 min= -33.3 max= +31.7
write n=11 mean= +0.7 median= -0.3 min= -23.1 max= +36.8
qd32 n=16 mean= +5.3 median= +9.9 min= -20.5 max= +31.7
q1 n= 9 mean= +4.5 median= +4.7 min= -33.3 max= +36.8
small 4K n= 6 mean= +13.8 median= +11.9 min= +9.6 max= +20.8
large >=128K n=20 mean= +2.2 median= +0.5 min= -33.3 max= +36.8
- HDMA (SpacemiT K3)
Summary by group (BW delta %)
all n=26 mean= +21.5 median= +11.4 min= -23.4 max= +71.1
read n=14 mean= +15.3 median= +10.5 min= -23.4 max= +69.9
write n=11 mean= +31.0 median= +44.6 min= -6.2 max= +71.1
qd32 n=16 mean= +25.7 median= +13.6 min= -8.3 max= +69.9
q1 n= 9 mean= +16.1 median= +7.0 min= -23.4 max= +71.1
small 4K n= 6 mean= +26.6 median= +16.8 min= -6.2 max= +69.9
large >=128K n=20 mean= +20.0 median= +11.4 min= -23.4 max= +71.1
2. pci_endpoint_test
READ_TEST and WRITE_TEST passed with this v6 prep series on both
testbeds.
[1] K3 was tested on an Ubuntu kernel with the prerequisite patches
backported (+ some tweaks on top), not directly on the upstream
base. The "Before" and "After" kernels differ only by this series.
Thanks for reviewing.
Best regards,
Koichiro
---
Changes in v6 (from v5 patch 1-10):
- No changes.
Links to the original aggregate series:
v5: https://lore.kernel.org/r/20260812155721.2807506-1-den@valinux.co.jp/
v4: https://lore.kernel.org/r/20260729143036.3087722-1-den@valinux.co.jp/
v3: https://lore.kernel.org/r/20260727170323.2321369-1-den@valinux.co.jp/
v2: https://lore.kernel.org/r/20260723084150.521366-1-den@valinux.co.jp/
v1: https://lore.kernel.org/r/20260615154111.2174161-1-den@valinux.co.jp/
Frank Li (3):
dmaengine: dw-edma: Add dw_edma_core_ll_cur_idx() to get current LL
entry index
dmaengine: dw-edma: Make DMA link list work as a circular buffer
dmaengine: dw-edma: Move callback result helper before LL helpers
Koichiro Den (7):
dmaengine: dw-edma: Add dw_edma_core_ll_clear() to clear LL
control-word
dmaengine: dw-edma: Factor out linked-list transfer start
dmaengine: dw-edma: Dispatch DONE interrupts by channel request
dmaengine: dw-edma: Centralize LL doorbell decisions
dmaengine: dw-edma: Prepare LL progress event handling
dmaengine: dw-edma: Prepare deferred IRQ reporting for LL events
dmaengine: dw-edma: Prepare LL kicks for event serialization
drivers/dma/dw-edma/dw-edma-core.c | 341 ++++++++++++++++++--------
drivers/dma/dw-edma/dw-edma-core.h | 67 ++++-
drivers/dma/dw-edma/dw-edma-v0-core.c | 59 +++--
drivers/dma/dw-edma/dw-hdma-v0-core.c | 59 +++--
include/linux/dma/edma.h | 2 +-
5 files changed, 377 insertions(+), 151 deletions(-)
base-commit: 0d995da5fb97e8c312834575604d4423eb6225b7
--
2.51.0