arch/arm64/boot/dts/qcom/shikra-cqm-evk.dts | 10 ++++++++++ arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts | 10 ++++++++++ arch/arm64/boot/dts/qcom/shikra-iqs-evk.dts | 10 ++++++++++ 3 files changed, 30 insertions(+)
The Shikra EVK boards (CQM, CQS, IQS) carry an ST33 discrete TPM
connected via SPI5. Enable the SPI controller and add the TPM node
with the ST33HTPM compatible and a 20 MHz max clock.
This change requires SPI5 to be enabled in shikra-evk.dtsi [1].
[1] https://lore.kernel.org/all/20260820085347.822-1-xueyao.an@oss.qualcomm.com/
Signed-off-by: Khalid Faisal Ansari <khalid.ansari@oss.qualcomm.com>
---
The Shikra EVK boards (CQM, CQS, IQS) have an ST33 discrete TPM (dTPM)
connected over SPI5. Enable the SPI controller and add the TPM node for
all three board variants.
This series depends on the SPI5 node addition in shikra-evk.dtsi:
https://lore.kernel.org/all/20260820085347.822-1-xueyao.an@oss.qualcomm.com/
---
Changes in v2:
- EDITME: describe what is new in this series revision.
- EDITME: use bulletpoints and terse descriptions.
- Link to v1: https://lore.kernel.org/r/20260820-shikra_dtpm-v1-1-40d96b8238bb@oss.qualcomm.com
---
arch/arm64/boot/dts/qcom/shikra-cqm-evk.dts | 10 ++++++++++
arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts | 10 ++++++++++
arch/arm64/boot/dts/qcom/shikra-iqs-evk.dts | 10 ++++++++++
3 files changed, 30 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/shikra-cqm-evk.dts b/arch/arm64/boot/dts/qcom/shikra-cqm-evk.dts
index b112b21b1d79..32916e9df9d3 100644
--- a/arch/arm64/boot/dts/qcom/shikra-cqm-evk.dts
+++ b/arch/arm64/boot/dts/qcom/shikra-cqm-evk.dts
@@ -57,3 +57,13 @@ &sdhc_1 {
status = "okay";
};
+
+&spi5 {
+ status = "okay";
+
+ tpm@0 {
+ compatible = "st,st33htpm-spi", "tcg,tpm_tis-spi";
+ reg = <0>;
+ spi-max-frequency = <20000000>;
+ };
+};
diff --git a/arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts b/arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts
index e62ba5aef71f..bacdc7c77c2f 100644
--- a/arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts
+++ b/arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts
@@ -57,3 +57,13 @@ &sdhc_1 {
status = "okay";
};
+
+&spi5 {
+ status = "okay";
+
+ tpm@0 {
+ compatible = "st,st33htpm-spi", "tcg,tpm_tis-spi";
+ reg = <0>;
+ spi-max-frequency = <20000000>;
+ };
+};
diff --git a/arch/arm64/boot/dts/qcom/shikra-iqs-evk.dts b/arch/arm64/boot/dts/qcom/shikra-iqs-evk.dts
index 727809430fd1..b42f94708bfd 100644
--- a/arch/arm64/boot/dts/qcom/shikra-iqs-evk.dts
+++ b/arch/arm64/boot/dts/qcom/shikra-iqs-evk.dts
@@ -57,3 +57,13 @@ &sdhc_1 {
status = "okay";
};
+
+&spi5 {
+ status = "okay";
+
+ tpm@0 {
+ compatible = "st,st33htpm-spi", "tcg,tpm_tis-spi";
+ reg = <0>;
+ spi-max-frequency = <20000000>;
+ };
+};
---
base-commit: a4ff2be345d0abc943da8dd8da98151843b750dc
change-id: 20260820-shikra_dtpm-2bc494dd6756
Best regards,
--
Khalid Faisal Ansari <khalid.ansari@oss.qualcomm.com>On 26-08-20 15:08:00, Khalid Faisal Ansari wrote: > The Shikra EVK boards (CQM, CQS, IQS) carry an ST33 discrete TPM > connected via SPI5. Enable the SPI controller and add the TPM node > with the ST33HTPM compatible and a 20 MHz max clock. > > This change requires SPI5 to be enabled in shikra-evk.dtsi [1]. > > [1] https://lore.kernel.org/all/20260820085347.822-1-xueyao.an@oss.qualcomm.com/ > > Signed-off-by: Khalid Faisal Ansari <khalid.ansari@oss.qualcomm.com> Also, you missed some R-b tags.
On 26-08-20 15:08:00, Khalid Faisal Ansari wrote: > The Shikra EVK boards (CQM, CQS, IQS) carry an ST33 discrete TPM > connected via SPI5. Enable the SPI controller and add the TPM node > with the ST33HTPM compatible and a 20 MHz max clock. > > This change requires SPI5 to be enabled in shikra-evk.dtsi [1]. > > [1] https://lore.kernel.org/all/20260820085347.822-1-xueyao.an@oss.qualcomm.com/ > > Signed-off-by: Khalid Faisal Ansari <khalid.ansari@oss.qualcomm.com> Please give reviewers some time to review before you send another version.
On 20/08/2026 11:38, Khalid Faisal Ansari wrote: > The Shikra EVK boards (CQM, CQS, IQS) carry an ST33 discrete TPM > connected via SPI5. Enable the SPI controller and add the TPM node > with the ST33HTPM compatible and a 20 MHz max clock. > > This change requires SPI5 to be enabled in shikra-evk.dtsi [1]. > > [1] https://lore.kernel.org/all/20260820085347.822-1-xueyao.an@oss.qualcomm.com/ > > Signed-off-by: Khalid Faisal Ansari <khalid.ansari@oss.qualcomm.com> > --- > The Shikra EVK boards (CQM, CQS, IQS) have an ST33 discrete TPM (dTPM) > connected over SPI5. Enable the SPI controller and add the TPM node for > all three board variants. > > This series depends on the SPI5 node addition in shikra-evk.dtsi: > https://lore.kernel.org/all/20260820085347.822-1-xueyao.an@oss.qualcomm.com/ > --- > Changes in v2: > - EDITME: describe what is new in this series revision. > - EDITME: use bulletpoints and terse descriptions. > - Link to v1: https://lore.kernel.org/r/20260820-shikra_dtpm-v1-1-40d96b8238bb@oss.qualcomm.com No, implement entire feedback. Best regards, Krzysztof
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