The MCP2518FD CAN controller is limited to 14MHz because higher SPI
frequencies are unreliable with the current SPI3 pin drive strength.

Set the SPI3 data, clock and chip-select lines to 8mA drive strength and
raise spi-max-frequency to 17MHz, the maximum allowed by the MCP2518FD
errata:

  0.85 * Fosc / 2 = 0.85 * 40MHz / 2 = 17MHz

Signed-off-by: Viken Dadhaniya <viken.dadhaniya@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 12 +++++++++++-
 1 file changed, 11 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
index 90f2eebc349f..eb8d83317f36 100644
--- a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
+++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
@@ -1105,6 +1105,16 @@ &pon_resin {
 	status = "okay";
 };
 
+&qup_spi3_cs {
+	drive-strength = <8>;
+	bias-disable;
+};
+
+&qup_spi3_data_clk {
+	drive-strength = <8>;
+	bias-disable;
+};
+
 &qup_uart7_cts {
 	/*
 	 * Configure a bias-bus-hold on CTS to lower power
@@ -1233,7 +1243,7 @@ can@0 {
 		reg = <0>;
 		interrupts-extended = <&tlmm 7 IRQ_TYPE_LEVEL_LOW>;
 		clocks = <&mcp2518fd_osc>;
-		spi-max-frequency = <14000000>;
+		spi-max-frequency = <17000000>;
 		vdd-supply = <&vreg_l11c_2p8>;
 		microchip,xstbyen;
 	};

---
base-commit: 0f6da28aab51b16762ed82e8fdeaa5042da45b08
change-id: 20260810-kodiak-spi-can-17mhz-freq-c831e1893af8

Best regards,
--  
Viken Dadhaniya <viken.dadhaniya@oss.qualcomm.com>

On Tue, 11 Aug 2026 00:00:44 +0530, Viken Dadhaniya wrote:
> The MCP2518FD CAN controller is limited to 14MHz because higher SPI
> frequencies are unreliable with the current SPI3 pin drive strength.
> 
> Set the SPI3 data, clock and chip-select lines to 8mA drive strength and
> raise spi-max-frequency to 17MHz, the maximum allowed by the MCP2518FD
> errata:
> 
> [...]

Applied, thanks!

[1/1] arm64: dts: qcom: qcs6490-rb3gen2: Increase MCP2518FD SPI frequency to 17MHz
      commit: 691767f7d313417a79c44f6e77318c0db83be5ec

Best regards,
-- 
Bjorn Andersson <andersson@kernel.org>

On 8/10/26 8:30 PM, Viken Dadhaniya wrote:
> The MCP2518FD CAN controller is limited to 14MHz because higher SPI
> frequencies are unreliable with the current SPI3 pin drive strength.
> 
> Set the SPI3 data, clock and chip-select lines to 8mA drive strength and
> raise spi-max-frequency to 17MHz, the maximum allowed by the MCP2518FD
> errata:
> 
>   0.85 * Fosc / 2 = 0.85 * 40MHz / 2 = 17MHz
> 
> Signed-off-by: Viken Dadhaniya <viken.dadhaniya@oss.qualcomm.com>
> ---

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>

Konrad

On Tue, Aug 11, 2026 at 12:00:44AM +0530, Viken Dadhaniya wrote:
> The MCP2518FD CAN controller is limited to 14MHz because higher SPI
> frequencies are unreliable with the current SPI3 pin drive strength.
> 
> Set the SPI3 data, clock and chip-select lines to 8mA drive strength and
> raise spi-max-frequency to 17MHz, the maximum allowed by the MCP2518FD
> errata:
> 
>   0.85 * Fosc / 2 = 0.85 * 40MHz / 2 = 17MHz
> 
> Signed-off-by: Viken Dadhaniya <viken.dadhaniya@oss.qualcomm.com>
> ---
>  arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 12 +++++++++++-
>  1 file changed, 11 insertions(+), 1 deletion(-)
> 

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>


-- 
With best wishes
Dmitry