arch/arm64/boot/dts/qcom/glymur.dtsi | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)
From: Sairamreddy Bojja <sairamreddy.bojja@oss.qualcomm.com>
Add the missing SIDs for the LPASS eNPU masters to the ADSP
iommus list. These masters are exercised during audio record
use cases where Environmental Acoustic Intelligence (EAI)
models run on the eNPUs.
Currently all transactions from these eNPU masters will result
in global faults; fix them by adding the additional SIDs.
Fixes: cd1d174c75f7 ("arm64: dts: qcom: glymur: Add ADSP and CDSP for Glymur SoC")
Signed-off-by: Sairamreddy Bojja <sairamreddy.bojja@oss.qualcomm.com>
Co-developed-by: Iranna Mundaganur <iranna.mundaganur@oss.qualcomm.com>
Signed-off-by: Iranna Mundaganur <iranna.mundaganur@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/glymur.dtsi | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/glymur.dtsi b/arch/arm64/boot/dts/qcom/glymur.dtsi
index f04058d2e089..6b06e0acbcf0 100644
--- a/arch/arm64/boot/dts/qcom/glymur.dtsi
+++ b/arch/arm64/boot/dts/qcom/glymur.dtsi
@@ -4084,7 +4084,9 @@ remoteproc_adsp: remoteproc@6800000 {
compatible = "qcom,glymur-adsp-pas", "qcom,sm8550-adsp-pas";
reg = <0x0 0x06800000 0x0 0x10000>;
- iommus = <&apps_smmu 0x1000 0x0>;
+ iommus = <&apps_smmu 0x1000 0x0>,
+ <&apps_smmu 0x1040 0x20>,
+ <&apps_smmu 0x1080 0x0>;
interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>,
<&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>,
---
base-commit: 3d08ff75a47a3e7e2ab45a3bcab6723b4d906422
change-id: 20260811-adsp-smmu-fix-180a9fd2fdd8
Best regards,
--
Iranna Mundaganur <iranna.mundaganur@oss.qualcomm.com>
On 8/11/26 6:44 PM, Iranna Mundaganur wrote:
> From: Sairamreddy Bojja <sairamreddy.bojja@oss.qualcomm.com>
>
> Add the missing SIDs for the LPASS eNPU masters to the ADSP
> iommus list. These masters are exercised during audio record
> use cases where Environmental Acoustic Intelligence (EAI)
> models run on the eNPUs.
Could you share a bit more details on how we can reproduce t his?
> Currently all transactions from these eNPU masters will result
> in global faults; fix them by adding the additional SIDs.
>
> Fixes: cd1d174c75f7 ("arm64: dts: qcom: glymur: Add ADSP and CDSP for Glymur SoC")
> Signed-off-by: Sairamreddy Bojja <sairamreddy.bojja@oss.qualcomm.com>
> Co-developed-by: Iranna Mundaganur <iranna.mundaganur@oss.qualcomm.com>
> Signed-off-by: Iranna Mundaganur <iranna.mundaganur@oss.qualcomm.com>
> ---
> arch/arm64/boot/dts/qcom/glymur.dtsi | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/glymur.dtsi b/arch/arm64/boot/dts/qcom/glymur.dtsi
> index f04058d2e089..6b06e0acbcf0 100644
> --- a/arch/arm64/boot/dts/qcom/glymur.dtsi
> +++ b/arch/arm64/boot/dts/qcom/glymur.dtsi
> @@ -4084,7 +4084,9 @@ remoteproc_adsp: remoteproc@6800000 {
> compatible = "qcom,glymur-adsp-pas", "qcom,sm8550-adsp-pas";
> reg = <0x0 0x06800000 0x0 0x10000>;
>
> - iommus = <&apps_smmu 0x1000 0x0>;
> + iommus = <&apps_smmu 0x1000 0x0>,
> + <&apps_smmu 0x1040 0x20>,
The correct SID base is 0x1060 (although the mask makes them equivalent)
> + <&apps_smmu 0x1080 0x0>;
This will bind the eNPU streams together with the ADSP firmware stream
into a single iommu domain - is that your intent?
Konrad
On 19-08-2026 17:16, Konrad Dybcio wrote:
> On 8/11/26 6:44 PM, Iranna Mundaganur wrote:
>> From: Sairamreddy Bojja <sairamreddy.bojja@oss.qualcomm.com>
>>
>> Add the missing SIDs for the LPASS eNPU masters to the ADSP
>> iommus list. These masters are exercised during audio record
>> use cases where Environmental Acoustic Intelligence (EAI)
>> models run on the eNPUs.
> Could you share a bit more details on how we can reproduce t his?
This use case is not enabled upstream yet, we validate it downstream with the
AudioReach application where EAI models run on eNPU0/eNPU1 and need memory
access from those masters.
>
>> Currently all transactions from these eNPU masters will result
>> in global faults; fix them by adding the additional SIDs.
>>
>> Fixes: cd1d174c75f7 ("arm64: dts: qcom: glymur: Add ADSP and CDSP for Glymur SoC")
>> Signed-off-by: Sairamreddy Bojja <sairamreddy.bojja@oss.qualcomm.com>
>> Co-developed-by: Iranna Mundaganur <iranna.mundaganur@oss.qualcomm.com>
>> Signed-off-by: Iranna Mundaganur <iranna.mundaganur@oss.qualcomm.com>
>> ---
>> arch/arm64/boot/dts/qcom/glymur.dtsi | 4 +++-
>> 1 file changed, 3 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/glymur.dtsi b/arch/arm64/boot/dts/qcom/glymur.dtsi
>> index f04058d2e089..6b06e0acbcf0 100644
>> --- a/arch/arm64/boot/dts/qcom/glymur.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/glymur.dtsi
>> @@ -4084,7 +4084,9 @@ remoteproc_adsp: remoteproc@6800000 {
>> compatible = "qcom,glymur-adsp-pas", "qcom,sm8550-adsp-pas";
>> reg = <0x0 0x06800000 0x0 0x10000>;
>>
>> - iommus = <&apps_smmu 0x1000 0x0>;
>> + iommus = <&apps_smmu 0x1000 0x0>,
>> + <&apps_smmu 0x1040 0x20>,
> The correct SID base is 0x1060 (although the mask makes them equivalent)
Yes, will fix this up in the next re-spin.
>
>> + <&apps_smmu 0x1080 0x0>;
> This will bind the eNPU streams together with the ADSP firmware stream
> into a single iommu domain - is that your intent?
Yes, we've been told that these SIDs would need access to all the memory
regions ADSP firmware stream is given access to, so we want them grouped
into a single domain.
Thanks,
Iranna
On Fri, Aug 21, 2026 at 12:54:03PM +0530, Iranna Mundaganur wrote:
>
> On 19-08-2026 17:16, Konrad Dybcio wrote:
> > On 8/11/26 6:44 PM, Iranna Mundaganur wrote:
> >> From: Sairamreddy Bojja <sairamreddy.bojja@oss.qualcomm.com>
> >>
> >> Add the missing SIDs for the LPASS eNPU masters to the ADSP
> >> iommus list. These masters are exercised during audio record
> >> use cases where Environmental Acoustic Intelligence (EAI)
> >> models run on the eNPUs.
> > Could you share a bit more details on how we can reproduce t his?
>
> This use case is not enabled upstream yet, we validate it downstream with the
> AudioReach application where EAI models run on eNPU0/eNPU1 and need memory
> access from those masters.
>
Even more reason to provide a proper commit message, clearly describing
the actual problem.
https://docs.kernel.org/process/submitting-patches.html#describe-your-changes
Regards,
Bjorn
> >
> >> Currently all transactions from these eNPU masters will result
> >> in global faults; fix them by adding the additional SIDs.
> >>
> >> Fixes: cd1d174c75f7 ("arm64: dts: qcom: glymur: Add ADSP and CDSP for Glymur SoC")
> >> Signed-off-by: Sairamreddy Bojja <sairamreddy.bojja@oss.qualcomm.com>
> >> Co-developed-by: Iranna Mundaganur <iranna.mundaganur@oss.qualcomm.com>
> >> Signed-off-by: Iranna Mundaganur <iranna.mundaganur@oss.qualcomm.com>
> >> ---
> >> arch/arm64/boot/dts/qcom/glymur.dtsi | 4 +++-
> >> 1 file changed, 3 insertions(+), 1 deletion(-)
> >>
> >> diff --git a/arch/arm64/boot/dts/qcom/glymur.dtsi b/arch/arm64/boot/dts/qcom/glymur.dtsi
> >> index f04058d2e089..6b06e0acbcf0 100644
> >> --- a/arch/arm64/boot/dts/qcom/glymur.dtsi
> >> +++ b/arch/arm64/boot/dts/qcom/glymur.dtsi
> >> @@ -4084,7 +4084,9 @@ remoteproc_adsp: remoteproc@6800000 {
> >> compatible = "qcom,glymur-adsp-pas", "qcom,sm8550-adsp-pas";
> >> reg = <0x0 0x06800000 0x0 0x10000>;
> >>
> >> - iommus = <&apps_smmu 0x1000 0x0>;
> >> + iommus = <&apps_smmu 0x1000 0x0>,
> >> + <&apps_smmu 0x1040 0x20>,
> > The correct SID base is 0x1060 (although the mask makes them equivalent)
>
> Yes, will fix this up in the next re-spin.
>
> >
> >> + <&apps_smmu 0x1080 0x0>;
> > This will bind the eNPU streams together with the ADSP firmware stream
> > into a single iommu domain - is that your intent?
>
> Yes, we've been told that these SIDs would need access to all the memory
> regions ADSP firmware stream is given access to, so we want them grouped
> into a single domain.
>
>
> Thanks,
> Iranna
>
On 31-08-2026 21:55, Bjorn Andersson wrote:
> On Fri, Aug 21, 2026 at 12:54:03PM +0530, Iranna Mundaganur wrote:
>> On 19-08-2026 17:16, Konrad Dybcio wrote:
>>> On 8/11/26 6:44 PM, Iranna Mundaganur wrote:
>>>> From: Sairamreddy Bojja <sairamreddy.bojja@oss.qualcomm.com>
>>>>
>>>> Add the missing SIDs for the LPASS eNPU masters to the ADSP
>>>> iommus list. These masters are exercised during audio record
>>>> use cases where Environmental Acoustic Intelligence (EAI)
>>>> models run on the eNPUs.
>>> Could you share a bit more details on how we can reproduce t his?
>> This use case is not enabled upstream yet, we validate it downstream with the
>> AudioReach application where EAI models run on eNPU0/eNPU1 and need memory
>> access from those masters.
>>
> Even more reason to provide a proper commit message, clearly describing
> the actual problem.
We are discussing this with the team and will get this fixed in the next re-spin.
Thanks for the review, Bjorn/Konard
Thanks,
Iranna
>
>>>> Currently all transactions from these eNPU masters will result
>>>> in global faults; fix them by adding the additional SIDs.
>>>>
>>>> Fixes: cd1d174c75f7 ("arm64: dts: qcom: glymur: Add ADSP and CDSP for Glymur SoC")
>>>> Signed-off-by: Sairamreddy Bojja <sairamreddy.bojja@oss.qualcomm.com>
>>>> Co-developed-by: Iranna Mundaganur <iranna.mundaganur@oss.qualcomm.com>
>>>> Signed-off-by: Iranna Mundaganur <iranna.mundaganur@oss.qualcomm.com>
>>>> ---
>>>> arch/arm64/boot/dts/qcom/glymur.dtsi | 4 +++-
>>>> 1 file changed, 3 insertions(+), 1 deletion(-)
>>>>
>>>> diff --git a/arch/arm64/boot/dts/qcom/glymur.dtsi b/arch/arm64/boot/dts/qcom/glymur.dtsi
>>>> index f04058d2e089..6b06e0acbcf0 100644
>>>> --- a/arch/arm64/boot/dts/qcom/glymur.dtsi
>>>> +++ b/arch/arm64/boot/dts/qcom/glymur.dtsi
>>>> @@ -4084,7 +4084,9 @@ remoteproc_adsp: remoteproc@6800000 {
>>>> compatible = "qcom,glymur-adsp-pas", "qcom,sm8550-adsp-pas";
>>>> reg = <0x0 0x06800000 0x0 0x10000>;
>>>>
>>>> - iommus = <&apps_smmu 0x1000 0x0>;
>>>> + iommus = <&apps_smmu 0x1000 0x0>,
>>>> + <&apps_smmu 0x1040 0x20>,
>>> The correct SID base is 0x1060 (although the mask makes them equivalent)
>> Yes, will fix this up in the next re-spin.
>>
>>>> + <&apps_smmu 0x1080 0x0>;
>>> This will bind the eNPU streams together with the ADSP firmware stream
>>> into a single iommu domain - is that your intent?
>> Yes, we've been told that these SIDs would need access to all the memory
>> regions ADSP firmware stream is given access to, so we want them grouped
>> into a single domain.
>>
>>
>> Thanks,
>> Iranna
>>
On 26-08-11 22:14:59, Iranna Mundaganur wrote:
> From: Sairamreddy Bojja <sairamreddy.bojja@oss.qualcomm.com>
>
> Add the missing SIDs for the LPASS eNPU masters to the ADSP
> iommus list. These masters are exercised during audio record
> use cases where Environmental Acoustic Intelligence (EAI)
> models run on the eNPUs.
>
> Currently all transactions from these eNPU masters will result
> in global faults; fix them by adding the additional SIDs.
>
> Fixes: cd1d174c75f7 ("arm64: dts: qcom: glymur: Add ADSP and CDSP for Glymur SoC")
> Signed-off-by: Sairamreddy Bojja <sairamreddy.bojja@oss.qualcomm.com>
> Co-developed-by: Iranna Mundaganur <iranna.mundaganur@oss.qualcomm.com>
> Signed-off-by: Iranna Mundaganur <iranna.mundaganur@oss.qualcomm.com>
Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
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