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[PATCH v2] arm64: dts: qcom: hamoa-iot-evk: switch typec0 to PS8830 retimer

Xin Liu posted 1 patch 1 month, 4 weeks ago 
arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts | 108 ++++++++++++---------
1 file changed, 60 insertions(+), 48 deletions(-)
[PATCH v2] arm64: dts: qcom: hamoa-iot-evk: switch typec0 to PS8830 retimer
Posted by Xin Liu 1 month, 4 weeks ago 
The Hamoa IoT EVK hardware design uses a Parade PS8830 retimer on
I2C3 for USB Type-C port 0. Describe the retimer and route typec0
through it to enable USB 3.0 SuperSpeed and DisplayPort Alt Mode.

Supply the PS8830 from the existing vreg_rtmr0_* rails and remove
their stale "Left unused" annotation.

The FSUSB42 SBU mux chip is present on the PCB but with all signal
lines unconnected (NC), so remove the fsusb42 node and its pinctrl
group.

Tested on the Hamoa IoT EVK:

USB 3.0 SuperSpeed at 5 Gbps on typec0
DisplayPort Alt Mode on typec0

Signed-off-by: Guodong Xu <guodong.xu@oss.qualcomm.com>
Signed-off-by: Xin Liu <xin.liu@oss.qualcomm.com>
---
Changes in v2:
 - Clarify that FSUSB42 is present on PCB but with all signal lines
   unconnected (NC), rather than "won't be populated"
 - Add test results (USB 3.0 SuperSpeed and DisplayPort Alt Mode on typec0)

Link: https://lore.kernel.org/all/20260721074145.1534100-1-xin.liu@oss.qualcomm.com/

 arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts | 108 ++++++++++++---------
 1 file changed, 60 insertions(+), 48 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts b/arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts
index 9fa86bb6438e..a3ca22f9c3e8 100644
--- a/arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts
+++ b/arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts
@@ -126,15 +126,15 @@ port@1 {
 					reg = <1>;
 
 					pmic_glink_ss0_ss_in: endpoint {
-						remote-endpoint = <&usb_1_ss0_qmpphy_out>;
+						remote-endpoint = <&retimer_ss0_ss_out>;
 					};
 				};
 
 				port@2 {
 					reg = <2>;
 
-					pmic_glink_ss0_sbu: endpoint {
-						remote-endpoint = <&usb_1_ss0_sbu_mux>;
+					pmic_glink_ss0_con_sbu_in: endpoint {
+						remote-endpoint = <&retimer_ss0_con_sbu_out>;
 					};
 				};
 			};
@@ -303,7 +303,6 @@ vreg_pcie_3v3_aux: regulator-pcie-3v3-aux {
 		pinctrl-names = "default";
 	};
 
-	/* Left unused as the retimer is not used on this board. */
 	vreg_rtmr0_1p15: regulator-rtmr0-1p15 {
 		compatible = "regulator-fixed";
 
@@ -658,25 +657,6 @@ platform {
 		};
 	};
 
-	usb-1-ss0-sbu-mux {
-		compatible = "onnn,fsusb42", "gpio-sbu-mux";
-
-		enable-gpios = <&tlmm 168 GPIO_ACTIVE_LOW>;
-		select-gpios = <&tlmm 167 GPIO_ACTIVE_HIGH>;
-
-		pinctrl-0 = <&usb_1_ss0_sbu_default>;
-		pinctrl-names = "default";
-
-		mode-switch;
-		orientation-switch;
-
-		port {
-			usb_1_ss0_sbu_mux: endpoint {
-				remote-endpoint = <&pmic_glink_ss0_sbu>;
-			};
-		};
-	};
-
 	wcn7850-pmu {
 		compatible = "qcom,wcn7850-pmu";
 
@@ -793,6 +773,62 @@ retimer_ss2_con_sbu_out: endpoint {
 	};
 };
 
+&i2c3 {
+	clock-frequency = <400000>;
+	status = "okay";
+
+	typec-mux@8 {
+		compatible = "parade,ps8830";
+		reg = <0x08>;
+
+		clocks = <&rpmhcc RPMH_RF_CLK4>;
+
+		vdd-supply = <&vreg_rtmr0_1p15>;
+		vdd33-supply = <&vreg_rtmr0_3p3>;
+		vdd33-cap-supply = <&vreg_rtmr0_3p3>;
+		vddar-supply = <&vreg_rtmr0_1p15>;
+		vddat-supply = <&vreg_rtmr0_1p15>;
+		vddio-supply = <&vreg_rtmr0_1p8>;
+
+		reset-gpios = <&pm8550_gpios 10 GPIO_ACTIVE_LOW>;
+
+		pinctrl-0 = <&rtmr0_default>;
+		pinctrl-names = "default";
+
+		orientation-switch;
+		retimer-switch;
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
+
+				retimer_ss0_ss_out: endpoint {
+					remote-endpoint = <&pmic_glink_ss0_ss_in>;
+				};
+			};
+
+			port@1 {
+				reg = <1>;
+
+				retimer_ss0_ss_in: endpoint {
+					remote-endpoint = <&usb_1_ss0_qmpphy_out>;
+				};
+			};
+
+			port@2 {
+				reg = <2>;
+
+				retimer_ss0_con_sbu_out: endpoint {
+					remote-endpoint = <&pmic_glink_ss0_con_sbu_in>;
+				};
+			};
+		};
+	};
+};
+
 &i2c5 {
 	clock-frequency = <400000>;
 
@@ -1458,30 +1494,6 @@ usb2_pwr_3p3_reg_en: usb2-pwr-3p3-reg-en-state {
 		bias-disable;
 	};
 
-	usb_1_ss0_sbu_default: usb-1-ss0-sbu-state {
-		mode-pins {
-			pins = "gpio166";
-			function = "gpio";
-			bias-disable;
-			drive-strength = <2>;
-			output-high;
-		};
-
-		oe-n-pins {
-			pins = "gpio168";
-			function = "gpio";
-			bias-disable;
-			drive-strength = <2>;
-		};
-
-		sel-pins {
-			pins = "gpio167";
-			function = "gpio";
-			bias-disable;
-			drive-strength = <2>;
-		};
-	};
-
 	wcd_default: wcd-reset-n-active-state {
 		pins = "gpio191";
 		function = "gpio";
@@ -1578,7 +1590,7 @@ &usb_1_ss0_hsphy {
 };
 
 &usb_1_ss0_qmpphy_out {
-	remote-endpoint = <&pmic_glink_ss0_ss_in>;
+	remote-endpoint = <&retimer_ss0_ss_in>;
 };
 
 &usb_1_ss1_dwc3_hs {
-- 
2.43.0
Re: [PATCH v2] arm64: dts: qcom: hamoa-iot-evk: switch typec0 to PS8830 retimer
Posted by Konrad Dybcio 1 month, 2 weeks ago 
On 8/3/26 3:27 PM, Xin Liu wrote:
> The Hamoa IoT EVK hardware design uses a Parade PS8830 retimer on
> I2C3 for USB Type-C port 0. Describe the retimer and route typec0
> through it to enable USB 3.0 SuperSpeed and DisplayPort Alt Mode.
> 
> Supply the PS8830 from the existing vreg_rtmr0_* rails and remove
> their stale "Left unused" annotation.
> 
> The FSUSB42 SBU mux chip is present on the PCB but with all signal
> lines unconnected (NC), so remove the fsusb42 node and its pinctrl
> group.

[...]

> +&i2c3 {
> +	clock-frequency = <400000>;
> +	status = "okay";
> +
> +	typec-mux@8 {
> +		compatible = "parade,ps8830";
> +		reg = <0x08>;
> +
> +		clocks = <&rpmhcc RPMH_RF_CLK4>;

On other boards, the port0 retimer normally takes RF_CLK3 - have
you verified this bit?

Konrad
Re: [PATCH v2] arm64: dts: qcom: hamoa-iot-evk: switch typec0 to PS8830 retimer
Posted by Xin Liu 4 weeks ago 
On 8/18/2026 6:49 PM, Konrad Dybcio wrote:
> On 8/3/26 3:27 PM, Xin Liu wrote:
>> The Hamoa IoT EVK hardware design uses a Parade PS8830 retimer on
>> I2C3 for USB Type-C port 0. Describe the retimer and route typec0
>> through it to enable USB 3.0 SuperSpeed and DisplayPort Alt Mode.
>>
>> Supply the PS8830 from the existing vreg_rtmr0_* rails and remove
>> their stale "Left unused" annotation.
>>
>> The FSUSB42 SBU mux chip is present on the PCB but with all signal
>> lines unconnected (NC), so remove the fsusb42 node and its pinctrl
>> group.
> [...]
>
>> +&i2c3 {
>> +	clock-frequency = <400000>;
>> +	status = "okay";
>> +
>> +	typec-mux@8 {
>> +		compatible = "parade,ps8830";
>> +		reg = <0x08>;
>> +
>> +		clocks = <&rpmhcc RPMH_RF_CLK4>;
> On other boards, the port0 retimer normally takes RF_CLK3 - have
> you verified this bit?
>
> Konrad

Hi Konrad

Thanks for pointing this out.

I re-checked the schematic and confirmed that the Type-C0 retimer refclk
is provided by a board-level external XO/local XTAL, not by PMK/RPMH.
So RPMH_RF_CLK4 is not the correct clock source.

Since the binding requires a clock, I will model the board-level XO as a
fixed-clock and use it for the PS8830/PS8833 retimer node in v3.


Thanks,

XIN
Re: [PATCH v2] arm64: dts: qcom: hamoa-iot-evk: switch typec0 to PS8830 retimer
Posted by Dmitry Baryshkov 1 month, 4 weeks ago 
On Mon, Aug 03, 2026 at 06:27:47AM -0700, Xin Liu wrote:
> The Hamoa IoT EVK hardware design uses a Parade PS8830 retimer on
> I2C3 for USB Type-C port 0. Describe the retimer and route typec0
> through it to enable USB 3.0 SuperSpeed and DisplayPort Alt Mode.
> 
> Supply the PS8830 from the existing vreg_rtmr0_* rails and remove
> their stale "Left unused" annotation.
> 
> The FSUSB42 SBU mux chip is present on the PCB but with all signal
> lines unconnected (NC), so remove the fsusb42 node and its pinctrl
> group.

Why is it still present on the PCB?

> 
> Tested on the Hamoa IoT EVK:
> 
> USB 3.0 SuperSpeed at 5 Gbps on typec0
> DisplayPort Alt Mode on typec0
> 
> Signed-off-by: Guodong Xu <guodong.xu@oss.qualcomm.com>
> Signed-off-by: Xin Liu <xin.liu@oss.qualcomm.com>

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>


-- 
With best wishes
Dmitry
Re: [PATCH v2] arm64: dts: qcom: hamoa-iot-evk: switch typec0 to PS8830 retimer
Posted by Xin Liu 1 month, 4 weeks ago 
On 8/4/2026 3:35 AM, Dmitry Baryshkov wrote:
> On Mon, Aug 03, 2026 at 06:27:47AM -0700, Xin Liu wrote:
>> The Hamoa IoT EVK hardware design uses a Parade PS8830 retimer on
>> I2C3 for USB Type-C port 0. Describe the retimer and route typec0
>> through it to enable USB 3.0 SuperSpeed and DisplayPort Alt Mode.
>>
>> Supply the PS8830 from the existing vreg_rtmr0_* rails and remove
>> their stale "Left unused" annotation.
>>
>> The FSUSB42 SBU mux chip is present on the PCB but with all signal
>> lines unconnected (NC), so remove the fsusb42 node and its pinctrl
>> group.
> Why is it still present on the PCB?

The FSUSB42 is retained on the PCB as a fallback for the PS8830's SBU 
mux function.

Should the PS8830's SBU path encounter any issues, the FSUSB42 can 
be activated

with a simple rework to quickly switch to a discrete solution, avoiding 
a full board respin.


Thanks,
Xin

>> Tested on the Hamoa IoT EVK:
>>
>> USB 3.0 SuperSpeed at 5 Gbps on typec0
>> DisplayPort Alt Mode on typec0
>>
>> Signed-off-by: Guodong Xu <guodong.xu@oss.qualcomm.com>
>> Signed-off-by: Xin Liu <xin.liu@oss.qualcomm.com>
> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
>
>

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