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[RFC PATCH] arm64: dts: rockchip: H28K: release RTL8211F reset before MDIO probing

Zhyi posted 1 patch 1 month, 4 weeks ago
There is a newer version of this series
[RFC PATCH] arm64: dts: rockchip: H28K: release RTL8211F reset before MDIO probing
Posted by Zhyi 1 month, 4 weeks ago 
arm64: dts: rockchip: H28K: release RTL8211F reset before MDIO probing

The RTL8211F on the HINLINK H28K (RK3528) is held in reset at power-on:
its reset line (gpio4 RK_PC2, pin 146) is left unconfigured and reads
low. The PHY node's reset-gpios are only acted upon after the PHY has
been found on MDIO (fwnode_mdiobus_register_phy() reads the PHY ID
before it requests and toggles the reset GPIO), so the first probe
deadlocks and eth0 never gets a link:

    mdio_bus stmmac-0: MDIO device at address 1 is missing.
    rk_gmac-dwmac ffbe0000.ethernet eth0: cannot attach to PHY (error: -ENODEV)

Release the reset from the MAC node via snps,reset-gpios so it is
deasserted before MDIO scanning, and drop the PHY-node reset-gpios (a
second consumer on the same GPIO is rejected with -EBUSY).

This is an RFC: snps,reset-gpios is deprecated in favour of the
ethernet-PHY reset bindings, so feedback on the preferred way to release
the reset early is welcome.

Fixes: 145d4af4b204 ("arm64: dts: rockchip: Add HINLINK H28K")
Signed-off-by: Zhyi <zyheihei_123@163.com>
---
diff --git a/arch/arm64/boot/dts/rockchip/rk3528-hinlink-h28k.dts b/arch/arm64/boot/dts/rockchip/rk3528-hinlink-h28k.dts
index 0ec50e9..9d7e33a 100644
--- a/arch/arm64/boot/dts/rockchip/rk3528-hinlink-h28k.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3528-hinlink-h28k.dts
@@ -191,6 +191,8 @@
 		    <&rgmii_rx_bus2>,
 		    <&rgmii_rgmii_clk>,
 		    <&rgmii_rgmii_bus>;
+	snps,reset-gpios = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;
+	snps,reset-delays-us = <0 20000 100000>;
 	status = "okay";
 };
 
@@ -205,9 +207,6 @@
 		reg = <0x1>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&gmac1_rstn_l>;
-		reset-assert-us = <20000>;
-		reset-deassert-us = <100000>;
-		reset-gpios = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;
 	};
 };
Re: [RFC PATCH] arm64: dts: rockchip: H28K: release RTL8211F reset before MDIO probing
Posted by Chukun Pan 1 month, 4 weeks ago 
Hi,

> Release the reset from the MAC node via snps,reset-gpios so it is
> deasserted before MDIO scanning, and drop the PHY-node reset-gpios (a
> second consumer on the same GPIO is rejected with -EBUSY).

This is incorrect. Has your uboot's DT been synchronized with the kernel?
Normally, U-Boot will reset this GPIO. Another way to solve your problem
is to hardcode the PHY ID here. However, considering that manufacturers
might use either RTL8211F or YT8531, it's best to let U-Boot handle it.

For reference: https://github.com/openwrt/openwrt/commit/384127320e0b

By the way, you sent this patch twice within two hours...
[RFC PATCH v2] arm64: dts: rockchip: H28K: release RTL8211F reset before MDIO probing
Posted by Zhyi 1 month, 4 weeks ago 
arm64: dts: rockchip: H28K: release RTL8211F reset before MDIO probing

On the HINLINK H28K (RK3528), the RTL8211F reset line (gpio4 RK_PC2,
pin 146) is left unconfigured at power-on and reads low, holding the
PHY in reset. The PHY node's reset-gpios are only acted upon after the
PHY has been found on MDIO (fwnode_mdiobus_register_phy() reads the
PHY ID before it requests and toggles the reset GPIO), so the first
probe deadlocks and eth0 never gets a link:

    mdio_bus stmmac-0: MDIO device at address 1 is missing.
    rk_gmac-dwmac ffbe0000.ethernet eth0: cannot attach to PHY
    (error: -ENODEV)

Move the reset to the MDIO bus level: mdiobus_register() asserts and
releases the bus reset-gpios before scanning the bus, so the PHY is
out of reset when its ID is read. The PHY node no longer declares
reset-gpios for the same GPIO (a second consumer would be rejected
with -EBUSY).

Fixes: 145d4af4b204 ("arm64: dts: rockchip: Add HINLINK H28K")
Signed-off-by: Zhyi <zyheihei_123@163.com>
Assisted-by: Codex:gpt-5
---
Changes in v2:
- The root-cause analysis and this fix were developed with the
  assistance of an AI coding assistant (Codex, GPT-5). The resulting
  DTS change is minimal and the hardware validation was done by a
  human on a stock HINLINK H28K board.
- This v2 supersedes the accidental duplicate of my v1 RFC sent from
  my Outlook address (Message-ID:
  SJ2PR04MB851017E50140354C2F5B3FF3B5D52@SJ2PR04MB8510.namprd04.prod.outlook.com);
  apologies for the duplicate.
- Use the standard MDIO bus reset properties (mdio.yaml reset-gpios,
  reset-delay-us, reset-post-delay-us) instead of the deprecated
  snps,reset-gpios on the MAC node, as suggested by Andrew Lunn.
- The PHY ID is not hardcoded, so boards populated with either the
  RTL8211F or the YT8531 work unchanged (as noted by Chukun Pan).
- Thanks to Andrew Lunn and Chukun Pan for the review feedback.
- Validated on the stock HINLINK H28K board with Linux 7.1.5:
  eth0 shows "PHY [stmmac-0:01] driver [RTL8211F Gigabit Ethernet]"
  and phy_id 0x001cc916; both eth0 (GMAC) and eth1 (PCIe RTL8111H)
  work.
- The U-Boot side (generic RK3528 DT does not configure the reset
  line) is out of scope for this DTS fix and may be addressed
  separately.
diff --git a/arch/arm64/boot/dts/rockchip/rk3528-hinlink-h28k.dts b/arch/arm64/boot/dts/rockchip/rk3528-hinlink-h28k.dts
index 0ec50e9..7ba3fa4 100644
--- a/arch/arm64/boot/dts/rockchip/rk3528-hinlink-h28k.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3528-hinlink-h28k.dts
@@ -200,14 +200,14 @@
 };
 
 &mdio1 {
+	reset-gpios = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;
+	reset-delay-us = <20000>;
+	reset-post-delay-us = <100000>;
 	rgmii_phy: ethernet-phy@1 {
 		compatible = "ethernet-phy-ieee802.3-c22";
 		reg = <0x1>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&gmac1_rstn_l>;
-		reset-assert-us = <20000>;
-		reset-deassert-us = <100000>;
-		reset-gpios = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;
 	};
 };
Re: [RFC PATCH v2] arm64: dts: rockchip: H28K: release RTL8211F reset before MDIO probing
Posted by Jonas Karlman 1 month, 4 weeks ago 
Hi Zhyi,

On 8/3/2026 6:42 PM, Zhyi wrote:
> arm64: dts: rockchip: H28K: release RTL8211F reset before MDIO probing
> 
> On the HINLINK H28K (RK3528), the RTL8211F reset line (gpio4 RK_PC2,
> pin 146) is left unconfigured at power-on and reads low, holding the
> PHY in reset. The PHY node's reset-gpios are only acted upon after the
> PHY has been found on MDIO (fwnode_mdiobus_register_phy() reads the
> PHY ID before it requests and toggles the reset GPIO), so the first
> probe deadlocks and eth0 never gets a link:
> 
>     mdio_bus stmmac-0: MDIO device at address 1 is missing.
>     rk_gmac-dwmac ffbe0000.ethernet eth0: cannot attach to PHY
>     (error: -ENODEV)
> 
> Move the reset to the MDIO bus level: mdiobus_register() asserts and
> releases the bus reset-gpios before scanning the bus, so the PHY is
> out of reset when its ID is read. The PHY node no longer declares
> reset-gpios for the same GPIO (a second consumer would be rejected
> with -EBUSY).
> 
> Fixes: 145d4af4b204 ("arm64: dts: rockchip: Add HINLINK H28K")
> Signed-off-by: Zhyi <zyheihei_123@163.com>
> Assisted-by: Codex:gpt-5
> ---
> Changes in v2:
> - The root-cause analysis and this fix were developed with the
>   assistance of an AI coding assistant (Codex, GPT-5). The resulting
>   DTS change is minimal and the hardware validation was done by a
>   human on a stock HINLINK H28K board.
> - This v2 supersedes the accidental duplicate of my v1 RFC sent from
>   my Outlook address (Message-ID:
>   SJ2PR04MB851017E50140354C2F5B3FF3B5D52@SJ2PR04MB8510.namprd04.prod.outlook.com);
>   apologies for the duplicate.
> - Use the standard MDIO bus reset properties (mdio.yaml reset-gpios,
>   reset-delay-us, reset-post-delay-us) instead of the deprecated
>   snps,reset-gpios on the MAC node, as suggested by Andrew Lunn.
> - The PHY ID is not hardcoded, so boards populated with either the
>   RTL8211F or the YT8531 work unchanged (as noted by Chukun Pan).
> - Thanks to Andrew Lunn and Chukun Pan for the review feedback.
> - Validated on the stock HINLINK H28K board with Linux 7.1.5:
>   eth0 shows "PHY [stmmac-0:01] driver [RTL8211F Gigabit Ethernet]"
>   and phy_id 0x001cc916; both eth0 (GMAC) and eth1 (PCIe RTL8111H)
>   work.
> - The U-Boot side (generic RK3528 DT does not configure the reset
>   line) is out of scope for this DTS fix and may be addressed
>   separately.
> diff --git a/arch/arm64/boot/dts/rockchip/rk3528-hinlink-h28k.dts b/arch/arm64/boot/dts/rockchip/rk3528-hinlink-h28k.dts
> index 0ec50e9..7ba3fa4 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3528-hinlink-h28k.dts
> +++ b/arch/arm64/boot/dts/rockchip/rk3528-hinlink-h28k.dts
> @@ -200,14 +200,14 @@
>  };
>  
>  &mdio1 {
> +	reset-gpios = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;
> +	reset-delay-us = <20000>;
> +	reset-post-delay-us = <100000>;

This is not really a correct description of the hardware. The GPIO4_C2
pin is used for PHY reset, not to reset the MDIO bus. The device tree
should describe hardware, not be used to workaround issues in software.
Please see [1] for my prior analysis of this software issue.

Please add the rk3528-hinlink-h28k board as a target in mainline U-Boot
using the board specific device tree. That should help reset the
Ethernet PHY before Linux is started and solve your issue, as Chukun Pan
already suggested.

[1] https://lore.kernel.org/linux-rockchip/47d55aca-bee6-810f-379f-9431649fefa6@kwiboo.se/

Regards,
Jonas

>  	rgmii_phy: ethernet-phy@1 {
>  		compatible = "ethernet-phy-ieee802.3-c22";
>  		reg = <0x1>;
>  		pinctrl-names = "default";
>  		pinctrl-0 = <&gmac1_rstn_l>;
> -		reset-assert-us = <20000>;
> -		reset-deassert-us = <100000>;
> -		reset-gpios = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;
>  	};
>  };
>  
> 
> 
> _______________________________________________
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> Linux-rockchip@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-rockchip

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