[PATCH v3 0/3] drm/bridge: ti-sn65dsi83: Various fixes

Esben Haabendal posted 3 patches 1 month, 4 weeks ago
There is a newer version of this series
drivers/gpu/drm/bridge/ti-sn65dsi83.c | 39 +++++++++++++++++++++++------------
1 file changed, 26 insertions(+), 13 deletions(-)
[PATCH v3 0/3] drm/bridge: ti-sn65dsi83: Various fixes
Posted by Esben Haabendal 1 month, 4 weeks ago
This small series adds support for using SN65DSI84 in single-link mode with
output to LVDS channel B, and provides a fix for a PLL locking issue.

Signed-off-by: Esben Haabendal <esben@geanix.com>
---
Changes in v3:
- Rename panel_port variable to output_port.
- Propagate error code from drm_bridge_helper_reset_crtc() in
  sn65dsi83_reset_pipe().
- Drop with fix for premature PLL locking. Should be fixed in DSI host
  driver (or upstream bridge driver) instead.
  See https://lore.kernel.org/all/48f6f55f-43fd-4355-88b9-d2e2d0e26d07@kontron.de/
- Link to v2: https://patch.msgid.link/20260715-ti-sn65dsi83-fixes-v2-0-ebc4c3fe29b6@geanix.com

Changes in v2:
- Fix error handling in sn65dsi83_atomic_enable() to ensure
  drm_brige_exit() is always called on exit.
- Change logging level from warn to dbg for two messages in
  sn65dsi83_parse_dt().
- Removed trailing dot in comment lines.
- Added patch with fix so that DRM bridge critical section is exited on
  error in sn65dsi83_reset_work().
- Added Fixes and Cc: stable tags to the premature PLL patch.
- Re-ordered patch so fixes comes first.
- Link to v1: https://patch.msgid.link/20260711-ti-sn65dsi83-fixes-v1-0-d85eb5342b98@geanix.com

To: Luca Ceresoli <luca.ceresoli@bootlin.com>
To: Herve Codina <herve.codina@bootlin.com>
To: Andrzej Hajda <andrzej.hajda@intel.com>
To: Neil Armstrong <neil.armstrong@linaro.org>
To: Robert Foss <rfoss@kernel.org>
To: Laurent Pinchart <Laurent.pinchart@ideasonboard.com>
To: Jonas Karlman <jonas@kwiboo.se>
To: Jernej Skrabec <jernej.skrabec@gmail.com>
To: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
To: Maxime Ripard <mripard@kernel.org>
To: Thomas Zimmermann <tzimmermann@suse.de>
To: David Airlie <airlied@gmail.com>
To: Simona Vetter <simona@ffwll.ch>
To: Linus Walleij <linusw@kernel.org>
To: Frieder Schrempf <frieder.schrempf@kontron.de>
To: Marek Vasut <marex@denx.de>
Cc: dri-devel@lists.freedesktop.org
Cc: linux-kernel@vger.kernel.org

---
Esben Haabendal (3):
      drm/bridge: ti-sn65dsi83: Propagate error in sn65dsi83_reset_pipe()
      drm/bridge: ti-sn65dsi83: Fix error handling in sn65dsi83_reset_work()
      drm/bridge: ti-sn65dsi83: Support LVDS Channel B on SN65DSI84

 drivers/gpu/drm/bridge/ti-sn65dsi83.c | 39 +++++++++++++++++++++++------------
 1 file changed, 26 insertions(+), 13 deletions(-)
---
base-commit: 075b74841bd0065a3bda3440873c747938e69b68
change-id: 20260710-ti-sn65dsi83-fixes-1d08e0ac67b3

Best regards,
--  
Esben Haabendal <esben@geanix.com>
Re: [PATCH v3 0/3] drm/bridge: ti-sn65dsi83: Various fixes
Posted by Luca Ceresoli 1 month, 3 weeks ago
On Mon Aug 3, 2026 at 4:57 PM CEST, Esben Haabendal wrote:
> This small series adds support for using SN65DSI84 in single-link mode with
> output to LVDS channel B, and provides a fix for a PLL locking issue.
>
> Signed-off-by: Esben Haabendal <esben@geanix.com>

With the planned changes (Fixes/Cc:stable tags, patches 1-2 swapped)
applied you can send v4 with:

Reviewed-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
Tested-by: Luca Ceresoli <luca.ceresoli@bootlin.com>

Luca

--
Luca Ceresoli, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
Re: [PATCH v3 0/3] drm/bridge: ti-sn65dsi83: Various fixes
Posted by Esben Haabendal 1 month, 3 weeks ago
On Thursday, August 6th, 2026 at 11:02, Luca Ceresoli <luca.ceresoli@bootlin.com> wrote:

> On Mon Aug 3, 2026 at 4:57 PM CEST, Esben Haabendal wrote:
> > This small series adds support for using SN65DSI84 in single-link mode with
> > output to LVDS channel B, and provides a fix for a PLL locking issue.
> >
> > Signed-off-by: Esben Haabendal <esben@geanix.com>
> 
> With the planned changes (Fixes/Cc:stable tags, patches 1-2 swapped)
> applied you can send v4 with:
> 
> Reviewed-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
> Tested-by: Luca Ceresoli <luca.ceresoli@bootlin.com>

Thanks. I have made one additional change for v4 though.

As pointed out by sashiko-bot, I fixed a problem where we would end up with
an unbalanced irq enable counter if/when sn65dsi83_reset_pipe() failed.

And as I am introducing the possibility of sn65dsi_reset_pipe() actually
returning an error, this bug would be a regression introduced by this series
without this additional fix.

/Esben