The INTC0 interrupt-merge (INTM) space has 50 sources at 10 per bank, i.e.
INTC0_INTM_NUM / INTM_IRQS_PER_BANK = 5 banks. This is reflected everywhere
the banks are indexed: the aspeed_intc0_intm_routes[] table has 5 valid
entries, and the mask/unmask/eoi paths compute the bank as (hwirq -
INTM_BASE) / INTM_IRQS_PER_BANK, spanning banks 0-4. However,
INTC0_INTM_BANK_NUM is hardcoded to 3, so aspeed_intc0_disable_intm()
only clears IER for banks 0-2 at probe. Banks 3 and 4 are left in whatever
state firmware configured, which can leave interrupts enabled before a
handler is installed.
Derive the bank count from the source count so the probe-time disable
covers every bank.
Fixes: 07825e41519a ("irqchip/ast2700-intc: Add AST2700-A2 support")
Signed-off-by: Michael Pesa <michael.pesa@icloud.com>
---
Notes:
Tested with the ast2700-intc0 KUnit suite (9/9 passing) and boot-tested
on QEMU 10.2's ast2700-evb model with the intc0/intc1 stack active:
probe, hierarchical allocation and the merge-interrupt unmask paths
behave identically with and without this change. Note that QEMU only
implements the bank 0 INTM IER register, so the new probe-time writes to
banks 3 and 4 are not observable under emulation; testing on hardware
where firmware leaves the upper merge banks configured would be welcome.
drivers/irqchip/irq-ast2700-intc0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/irqchip/irq-ast2700-intc0.c b/drivers/irqchip/irq-ast2700-intc0.c
index 14b8b88f1179..5db915570f48 100644
--- a/drivers/irqchip/irq-ast2700-intc0.c
+++ b/drivers/irqchip/irq-ast2700-intc0.c
@@ -48,9 +48,9 @@
#define INTC0_INTMX_IER 0x1b00
#define INTC0_INTMX_ISR 0x1b04
#define INTC0_INTMX_BANK_SIZE 0x10
-#define INTC0_INTM_BANK_NUM 3
#define INTC0_IRQS_PER_BANK 32
#define INTM_IRQS_PER_BANK 10
+#define INTC0_INTM_BANK_NUM (INTC0_INTM_NUM / INTM_IRQS_PER_BANK)
#define INTC0_SEL_BASE 0x200
#define INTC0_SEL_BANK_SIZE 0x4
#define INTC0_SEL_ROUTE_SIZE 0x100
base-commit: 248951ddc14de84de3910f9b13f51491a8cd91df
--
2.55.0