Commit 212cdedcac11 ("phy: qcom-qmp: qserdes-com: Add v8
DP-specific qserdes register offsets") and commit d10736db98d2 ("phy:
qualcomm: qmp-combo: Add DP offsets and settings for Glymur platforms")
added identical header files for DisplayPort-specific registers on V8
PHYs, having different names. Get rid of one of the copies, reverting
commit d10736db98d2 ("phy: qualcomm: qmp-combo: Add DP offsets and
settings for Glymur platforms")

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
---
 .../phy/qualcomm/phy-qcom-qmp-dp-qserdes-com-v8.h  | 52 ----------------------
 1 file changed, 52 deletions(-)

diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-dp-qserdes-com-v8.h b/drivers/phy/qualcomm/phy-qcom-qmp-dp-qserdes-com-v8.h
deleted file mode 100644
index 2bef1eecdc56..000000000000
--- a/drivers/phy/qualcomm/phy-qcom-qmp-dp-qserdes-com-v8.h
+++ /dev/null
@@ -1,52 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Copyright (C) 2025 Linaro Ltd.
- */
-
-#ifndef QCOM_PHY_QMP_DP_QSERDES_COM_V8_H_
-#define QCOM_PHY_QMP_DP_QSERDES_COM_V8_H_
-
-/* Only for DP QMP V8 PHY - QSERDES COM registers */
-#define DP_QSERDES_V8_COM_HSCLK_SEL_1			0x03c
-#define DP_QSERDES_V8_COM_BIN_VCOCAL_CMP_CODE1_MODE0	0x058
-#define DP_QSERDES_V8_COM_BIN_VCOCAL_CMP_CODE2_MODE0	0x05c
-#define DP_QSERDES_V8_COM_SSC_STEP_SIZE1_MODE0		0x060
-#define DP_QSERDES_V8_COM_SSC_STEP_SIZE2_MODE0		0x064
-#define DP_QSERDES_V8_COM_CP_CTRL_MODE0			0x070
-#define DP_QSERDES_V8_COM_PLL_RCTRL_MODE0		0x074
-#define DP_QSERDES_V8_COM_PLL_CCTRL_MODE0		0x078
-#define DP_QSERDES_V8_COM_CORECLK_DIV_MODE0		0x07c
-#define DP_QSERDES_V8_COM_LOCK_CMP1_MODE0		0x080
-#define DP_QSERDES_V8_COM_LOCK_CMP2_MODE0		0x084
-#define DP_QSERDES_V8_COM_DEC_START_MODE0		0x088
-#define DP_QSERDES_V8_COM_DIV_FRAC_START1_MODE0		0x090
-#define DP_QSERDES_V8_COM_DIV_FRAC_START2_MODE0		0x094
-#define DP_QSERDES_V8_COM_DIV_FRAC_START3_MODE0		0x098
-#define DP_QSERDES_V8_COM_INTEGLOOP_GAIN0_MODE0		0x0a0
-#define DP_QSERDES_V8_COM_VCO_TUNE1_MODE0		0x0a8
-#define DP_QSERDES_V8_COM_INTEGLOOP_GAIN1_MODE0		0x0a4
-#define DP_QSERDES_V8_COM_VCO_TUNE2_MODE0		0x0ac
-#define DP_QSERDES_V8_COM_BG_TIMER			0x0bc
-#define DP_QSERDES_V8_COM_SSC_EN_CENTER			0x0c0
-#define DP_QSERDES_V8_COM_SSC_ADJ_PER1			0x0c4
-#define DP_QSERDES_V8_COM_SSC_PER1			0x0cc
-#define DP_QSERDES_V8_COM_SSC_PER2			0x0d0
-#define DP_QSERDES_V8_COM_BIAS_EN_CLKBUFLR_EN		0x0dc
-#define DP_QSERDES_V8_COM_CLK_ENABLE1			0x0e0
-#define DP_QSERDES_V8_COM_SYS_CLK_CTRL			0x0e4
-#define DP_QSERDES_V8_COM_SYSCLK_BUF_ENABLE		0x0e8
-#define DP_QSERDES_V8_COM_PLL_IVCO			0x0f4
-#define DP_QSERDES_V8_COM_SYSCLK_EN_SEL			0x110
-#define DP_QSERDES_V8_COM_RESETSM_CNTRL			0x118
-#define DP_QSERDES_V8_COM_LOCK_CMP_EN			0x120
-#define DP_QSERDES_V8_COM_VCO_TUNE_CTRL			0x13c
-#define DP_QSERDES_V8_COM_VCO_TUNE_MAP			0x140
-#define DP_QSERDES_V8_COM_CLK_SELECT			0x164
-#define DP_QSERDES_V8_COM_CORE_CLK_EN			0x170
-#define DP_QSERDES_V8_COM_CMN_CONFIG_1			0x174
-#define DP_QSERDES_V8_COM_SVS_MODE_CLK_SEL		0x180
-#define DP_QSERDES_V8_COM_CLK_FWD_CONFIG_1		0x2f4
-#define DP_QSERDES_V8_COM_CMN_STATUS			0x314
-#define DP_QSERDES_V8_COM_C_READY_STATUS		0x33c
-
-#endif

---
base-commit: b9810cd75b9fb56a3425d391cba3f608502bd474
change-id: 20260722-qmp-drop-duplicate-v8-594935bce9ef

Best regards,
--  
With best wishes
Dmitry