RDMA/mlx5: Make sure that UMR page is aligned to PAGE_SIZE

[PATCH rdma-next] RDMA/mlx5: Make sure that UMR page is aligned to PAGE_SIZE

Posted by Leon Romanovsky 2 days, 10 hours ago

From: Leon Romanovsky <leonro@nvidia.com>

The UMR XLT buffer needs to be aligned to PAGE_SIZE.

Fixes: b2022068dea0 ("RDMA/mlx5: use kmalloc() for UMR translation buffers")
Signed-off-by: Leon Romanovsky <leonro@nvidia.com>
---
 drivers/infiniband/hw/mlx5/umr.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/infiniband/hw/mlx5/umr.c b/drivers/infiniband/hw/mlx5/umr.c
index 80d0d190b26c..951de1d85632 100644
--- a/drivers/infiniband/hw/mlx5/umr.c
+++ b/drivers/infiniband/hw/mlx5/umr.c
@@ -518,7 +518,7 @@ static void *mlx5r_umr_alloc_xlt(size_t *nents, size_t ent_size, gfp_t gfp_mask)
 	size = min_t(size_t, ent_size * ALIGN(*nents, xlt_chunk_align),
 		     MLX5_MAX_UMR_CHUNK);
 	*nents = size / ent_size;
-	res = kmalloc(size, gfp_mask | __GFP_NOWARN);
+	res = kmalloc(PAGE_ALIGN(size), gfp_mask | __GFP_NOWARN);
 	if (res)
 		return res;
 

---
base-commit: 0e8e94c15091041ea8910cbfcade5a9c7cfe3f90
change-id: 20260722-fix-get-order-alignment-b35d7958832d

Best regards,
--  
Leon Romanovsky <leonro@nvidia.com>

Re: [PATCH rdma-next] RDMA/mlx5: Make sure that UMR page is aligned to PAGE_SIZE

Posted by Jason Gunthorpe 2 days, 2 hours ago

On Wed, Jul 22, 2026 at 02:41:13PM +0300, Leon Romanovsky wrote:
> From: Leon Romanovsky <leonro@nvidia.com>
> 
> The UMR XLT buffer needs to be aligned to PAGE_SIZE.

Why? It goes into a sgl? The device certainly does not work on
PAGE_SIZE, so if there is some alignment here it should be the MLX5
adaptor alignment

Jason

Re: [PATCH rdma-next] RDMA/mlx5: Make sure that UMR page is aligned to PAGE_SIZE

Posted by Leon Romanovsky 1 day, 13 hours ago

On Wed, Jul 22, 2026 at 04:41:03PM -0300, Jason Gunthorpe wrote:
> On Wed, Jul 22, 2026 at 02:41:13PM +0300, Leon Romanovsky wrote:
> > From: Leon Romanovsky <leonro@nvidia.com>
> > 
> > The UMR XLT buffer needs to be aligned to PAGE_SIZE.
> 
> Why? It goes into a sgl? The device certainly does not work on
> PAGE_SIZE, so if there is some alignment here it should be the MLX5
> adaptor alignment

We need an alignment to 2Kb as a minimum here.

In our case, we got the following assert:
 ‘mlx5_post_send_umr: assertion failed (MLX5_GET64(umr_pointer_desc_argument, data, address) & 0×7ff == 0)’

Thanks

> 
> Jason
>