CXL r4.0 §8.2.4.20.12 ("Committing Decoder Programming") and
§14.13.10 ("CXL HDM Decoder Zero Size Commit") permit committing an
HDM decoder with size 0. Firmware may commit and lock such decoders so
the OS cannot program regions through them; this is a platform design
choice rather than a specification requirement.

The kernel currently rejects these decoders with -ENXIO during port
enumeration and aborts enumeration of the entire port. On affected
systems, this prevents the CXL topology from appearing in userspace.

This series enumerates empty committed decoders into the topology while
keeping them out of region assembly.

Patch 1 makes zero-size DPA reservations first-class. Since the resource
tree cannot represent an empty range, an empty decoder is backed by a
separately allocated resource. This keeps port->hdm_end, skip handling,
and in-order DPA accounting consistent. Operations requiring non-empty
capacity, including region attachment and poison queries, are guarded
appropriately.

Patch 2 adds the mock_zero_size_decoders cxl_test module parameter,
disabled by default. When enabled, it installs committed, locked,
zero-sized endpoint, switch, and host-bridge decoders under
host-bridge0.

Testing on arm64 covered enumeration of eight locked zero-sized
decoders, DPA reservation and release after those decoders, ACPI
unbind/rebind, module reload, poison handling, and rejection of
incompatible cxl_test module-parameter combinations. The core patch was
also previously validated on a Montage CXL Type 3 device.

The corresponding ndctl test is attached at
https://lore.kernel.org/linux-cxl/20260709022857.18732-1-icheng@nvidia.com/

Changelog:

v6->v7:
- Rebase onto cxl/for-7.3/cxl-type2-test.
- Patch 1 is unchanged.
- Adapt patch 2 to the refactored Type-2/Type-3 decoder initialization
  paths.
- Integrate mock_zero_size_decoders with special-topology parameter
  validation and reject its incompatible use with fail_autoassemble.

Richard Cheng (2):
  cxl/hdm: Allow zero sized HDM decoders
  tools/testing/cxl: Enable zero sized decoders under hb0

 drivers/cxl/core/hdm.c       |  52 +++++++++++------
 drivers/cxl/core/mbox.c      |   3 +
 drivers/cxl/core/region.c    |  49 ++++++++++------
 drivers/cxl/cxl.h            |  10 ++++
 drivers/cxl/port.c           |   3 +
 tools/testing/cxl/test/cxl.c | 109 ++++++++++++++++++++++++++++++-----
 6 files changed, 177 insertions(+), 49 deletions(-)


base-commit: 1c6b4ceafc3b994871c29340e0c1ddb0af5800e7
-- 
2.43.0

On Tue, 21 Jul 2026 16:57:13 +0800
Richard Cheng <icheng@nvidia.com> wrote:

Hi Richard,

RESEND series should always include a brief note at the top of the cover letter
saying why. Otherwise it can get rather confusing for anyone seeing both.
I'd also always reply to original post (even it when to subset of people
or similar) just to call out you are resending and hopefully stop
the reviews getting split across the two postings.

If it was just that it had been a few weeks, don't resend for that.

Jonathan


> CXL r4.0 §8.2.4.20.12 ("Committing Decoder Programming") and
> §14.13.10 ("CXL HDM Decoder Zero Size Commit") permit committing an
> HDM decoder with size 0. Firmware may commit and lock such decoders so
> the OS cannot program regions through them; this is a platform design
> choice rather than a specification requirement.
> 
> The kernel currently rejects these decoders with -ENXIO during port
> enumeration and aborts enumeration of the entire port. On affected
> systems, this prevents the CXL topology from appearing in userspace.
> 
> This series enumerates empty committed decoders into the topology while
> keeping them out of region assembly.
> 
> Patch 1 makes zero-size DPA reservations first-class. Since the resource
> tree cannot represent an empty range, an empty decoder is backed by a
> separately allocated resource. This keeps port->hdm_end, skip handling,
> and in-order DPA accounting consistent. Operations requiring non-empty
> capacity, including region attachment and poison queries, are guarded
> appropriately.
> 
> Patch 2 adds the mock_zero_size_decoders cxl_test module parameter,
> disabled by default. When enabled, it installs committed, locked,
> zero-sized endpoint, switch, and host-bridge decoders under
> host-bridge0.
> 
> Testing on arm64 covered enumeration of eight locked zero-sized
> decoders, DPA reservation and release after those decoders, ACPI
> unbind/rebind, module reload, poison handling, and rejection of
> incompatible cxl_test module-parameter combinations. The core patch was
> also previously validated on a Montage CXL Type 3 device.
> 
> The corresponding ndctl test is attached at
> https://lore.kernel.org/linux-cxl/20260709022857.18732-1-icheng@nvidia.com/
> 
> Changelog:
> 
> v6->v7:
> - Rebase onto cxl/for-7.3/cxl-type2-test.
> - Patch 1 is unchanged.
> - Adapt patch 2 to the refactored Type-2/Type-3 decoder initialization
>   paths.
> - Integrate mock_zero_size_decoders with special-topology parameter
>   validation and reject its incompatible use with fail_autoassemble.
> 
> Richard Cheng (2):
>   cxl/hdm: Allow zero sized HDM decoders
>   tools/testing/cxl: Enable zero sized decoders under hb0
> 
>  drivers/cxl/core/hdm.c       |  52 +++++++++++------
>  drivers/cxl/core/mbox.c      |   3 +
>  drivers/cxl/core/region.c    |  49 ++++++++++------
>  drivers/cxl/cxl.h            |  10 ++++
>  drivers/cxl/port.c           |   3 +
>  tools/testing/cxl/test/cxl.c | 109 ++++++++++++++++++++++++++++++-----
>  6 files changed, 177 insertions(+), 49 deletions(-)
> 
> 
> base-commit: 1c6b4ceafc3b994871c29340e0c1ddb0af5800e7

On Wed, Jul 22, 2026 at 01:07:31AM +0800, Jonathan Cameron wrote:
> On Tue, 21 Jul 2026 16:57:13 +0800
> Richard Cheng <icheng@nvidia.com> wrote:
> 
> Hi Richard,
> 
> RESEND series should always include a brief note at the top of the cover letter
> saying why. Otherwise it can get rather confusing for anyone seeing both.
> I'd also always reply to original post (even it when to subset of people
> or similar) just to call out you are resending and hopefully stop
> the reviews getting split across the two postings.
> 
> If it was just that it had been a few weeks, don't resend for that.
> 
> Jonathan
>

Hi Jonathan,

Copied that, I'll keep this in mind.
Sorry for the inconvevient.

Best regards,
Richard Cheng.
 
> 
> > CXL r4.0 §8.2.4.20.12 ("Committing Decoder Programming") and
> > §14.13.10 ("CXL HDM Decoder Zero Size Commit") permit committing an
> > HDM decoder with size 0. Firmware may commit and lock such decoders so
> > the OS cannot program regions through them; this is a platform design
> > choice rather than a specification requirement.
> > 
> > The kernel currently rejects these decoders with -ENXIO during port
> > enumeration and aborts enumeration of the entire port. On affected
> > systems, this prevents the CXL topology from appearing in userspace.
> > 
> > This series enumerates empty committed decoders into the topology while
> > keeping them out of region assembly.
> > 
> > Patch 1 makes zero-size DPA reservations first-class. Since the resource
> > tree cannot represent an empty range, an empty decoder is backed by a
> > separately allocated resource. This keeps port->hdm_end, skip handling,
> > and in-order DPA accounting consistent. Operations requiring non-empty
> > capacity, including region attachment and poison queries, are guarded
> > appropriately.
> > 
> > Patch 2 adds the mock_zero_size_decoders cxl_test module parameter,
> > disabled by default. When enabled, it installs committed, locked,
> > zero-sized endpoint, switch, and host-bridge decoders under
> > host-bridge0.
> > 
> > Testing on arm64 covered enumeration of eight locked zero-sized
> > decoders, DPA reservation and release after those decoders, ACPI
> > unbind/rebind, module reload, poison handling, and rejection of
> > incompatible cxl_test module-parameter combinations. The core patch was
> > also previously validated on a Montage CXL Type 3 device.
> > 
> > The corresponding ndctl test is attached at
> > https://lore.kernel.org/linux-cxl/20260709022857.18732-1-icheng@nvidia.com/
> > 
> > Changelog:
> > 
> > v6->v7:
> > - Rebase onto cxl/for-7.3/cxl-type2-test.
> > - Patch 1 is unchanged.
> > - Adapt patch 2 to the refactored Type-2/Type-3 decoder initialization
> >   paths.
> > - Integrate mock_zero_size_decoders with special-topology parameter
> >   validation and reject its incompatible use with fail_autoassemble.
> > 
> > Richard Cheng (2):
> >   cxl/hdm: Allow zero sized HDM decoders
> >   tools/testing/cxl: Enable zero sized decoders under hb0
> > 
> >  drivers/cxl/core/hdm.c       |  52 +++++++++++------
> >  drivers/cxl/core/mbox.c      |   3 +
> >  drivers/cxl/core/region.c    |  49 ++++++++++------
> >  drivers/cxl/cxl.h            |  10 ++++
> >  drivers/cxl/port.c           |   3 +
> >  tools/testing/cxl/test/cxl.c | 109 ++++++++++++++++++++++++++++++-----
> >  6 files changed, 177 insertions(+), 49 deletions(-)
> > 
> > 
> > base-commit: 1c6b4ceafc3b994871c29340e0c1ddb0af5800e7
>