Add ETZPC as an access controller for the LTDC and DCMIPP found
on the stm32mp135.
Fixes: a06b9560eb6c ("ARM: dts: stm32: add ETZPC as a system bus for STM32MP13x boards")
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
---
arch/arm/boot/dts/st/stm32mp135.dtsi | 42 ++++++++++++++++++------------------
1 file changed, 21 insertions(+), 21 deletions(-)
diff --git a/arch/arm/boot/dts/st/stm32mp135.dtsi b/arch/arm/boot/dts/st/stm32mp135.dtsi
index 834a4d545fe44..f573335edf6b4 100644
--- a/arch/arm/boot/dts/st/stm32mp135.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp135.dtsi
@@ -6,29 +6,29 @@
#include "stm32mp133.dtsi"
-/ {
- soc {
- dcmipp: dcmipp@5a000000 {
- compatible = "st,stm32mp13-dcmipp";
- reg = <0x5a000000 0x400>;
- interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
- resets = <&rcc DCMIPP_R>;
- clocks = <&rcc DCMIPP_K>;
- status = "disabled";
+&etzpc {
+ dcmipp: dcmipp@5a000000 {
+ compatible = "st,stm32mp13-dcmipp";
+ reg = <0x5a000000 0x400>;
+ interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&rcc DCMIPP_R>;
+ clocks = <&rcc DCMIPP_K>;
+ access-controllers = <&etzpc 4>;
+ status = "disabled";
- port {
- };
+ port {
};
+ };
- ltdc: display-controller@5a001000 {
- compatible = "st,stm32-ltdc";
- reg = <0x5a001000 0x400>;
- interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&rcc LTDC_PX>;
- clock-names = "lcd";
- resets = <&scmi_reset RST_SCMI_LTDC>;
- status = "disabled";
- };
+ ltdc: display-controller@5a001000 {
+ compatible = "st,stm32-ltdc";
+ reg = <0x5a001000 0x400>;
+ interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&rcc LTDC_PX>;
+ clock-names = "lcd";
+ resets = <&scmi_reset RST_SCMI_LTDC>;
+ access-controllers = <&etzpc 3>;
+ status = "disabled";
};
};
---
base-commit: fba4a31a7f3b6b29b01c83180f83e7ed4c398738
change-id: 20260721-etzpc-mp13-ltdc-dcmipp-fix-63d6b9ab8451
Best regards,
--
Alain Volmat <alain.volmat@foss.st.com>