Add support for additional GCC EMAC RGMII clock frequencies (2.5MHz and
25MHz) required for the EMAC use-cases on Qualcomm Shikra SoC.

Signed-off-by: Imran Shaik <imran.shaik@oss.qualcomm.com>
---
 drivers/clk/qcom/gcc-shikra.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/clk/qcom/gcc-shikra.c b/drivers/clk/qcom/gcc-shikra.c
index d5222756f214c356214039f95a93a28fc542801b..f2ab50209e1c037cb84db67951def053880406ff 100644
--- a/drivers/clk/qcom/gcc-shikra.c
+++ b/drivers/clk/qcom/gcc-shikra.c
@@ -1244,6 +1244,8 @@ static struct clk_rcg2 gcc_emac0_ptp_clk_src = {
 };
 
 static const struct freq_tbl ftbl_gcc_emac0_rgmii_clk_src[] = {
+	F(2500000, P_GPLL0_OUT_AUX2, 10, 1, 12),
+	F(25000000, P_GPLL0_OUT_AUX2, 12, 0, 0),
 	F(50000000, P_GPLL0_OUT_AUX2, 6, 0, 0),
 	F(125000000, P_GPLL12_OUT_AUX2, 4, 0, 0),
 	F(250000000, P_GPLL12_OUT_EARLY, 4, 0, 0),

---
base-commit: 1a1757b76427f6201bfe0bf1bea9f7574f332a93
change-id: 20260717-b4-shikra-gcc-emac-freqs-2469d8b64a75

Best regards,
-- 
Imran Shaik <imran.shaik@oss.qualcomm.com>

On Fri, Jul 17, 2026 at 09:33:58AM +0530, Imran Shaik wrote:
> Add support for additional GCC EMAC RGMII clock frequencies (2.5MHz and
> 25MHz) required for the EMAC use-cases on Qualcomm Shikra SoC.
> 
> Signed-off-by: Imran Shaik <imran.shaik@oss.qualcomm.com>
> ---

Tested 10M/100M speeds on Shikra EMAC with this patch, so feel free to
add my t-b:

Tested-by: Mohd Ayaan Anwar <mohd.anwar@oss.qualcomm.com>

On 7/17/26 6:03 AM, Imran Shaik wrote:
> Add support for additional GCC EMAC RGMII clock frequencies (2.5MHz and
> 25MHz) required for the EMAC use-cases on Qualcomm Shikra SoC.
> 
> Signed-off-by: Imran Shaik <imran.shaik@oss.qualcomm.com>
> ---

It'd be useful to mention that they're necessary for 10M and 100M
speeds respectively

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>

Konrad

On 17-07-2026 02:18 pm, Konrad Dybcio wrote:
> On 7/17/26 6:03 AM, Imran Shaik wrote:
>> Add support for additional GCC EMAC RGMII clock frequencies (2.5MHz and
>> 25MHz) required for the EMAC use-cases on Qualcomm Shikra SoC.
>>
>> Signed-off-by: Imran Shaik <imran.shaik@oss.qualcomm.com>
>> ---
> 
> It'd be useful to mention that they're necessary for 10M and 100M
> speeds respectively
> 

Sure Konrad, will update the commit text with these details in next version.

Thanks,
Imran

> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
> 
> Konrad
>

On 7/17/2026 9:33 AM, Imran Shaik wrote:
>  drivers/clk/qcom/gcc-shikra.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/clk/qcom/gcc-shikra.c b/drivers/clk/qcom/gcc-shikra.c
> index d5222756f214c356214039f95a93a28fc542801b..f2ab50209e1c037cb84db67951def053880406ff 100644
> --- a/drivers/clk/qcom/gcc-shikra.c
> +++ b/drivers/clk/qcom/gcc-shikra.c
> @@ -1244,6 +1244,8 @@ static struct clk_rcg2 gcc_emac0_ptp_clk_src = {
>  };
>  
>  static const struct freq_tbl ftbl_gcc_emac0_rgmii_clk_src[] = {
> +	F(2500000, P_GPLL0_OUT_AUX2, 10, 1, 12),
> +	F(25000000, P_GPLL0_OUT_AUX2, 12, 0, 0),


Reviewed-by: Taniya Das <taniya.das@oss.qualcomm.com>

-- 
Thanks,
Taniya Das