[PATCH 0/2] Add CoreSight nodes for Qualcomm Shikra SoC

Jie Gan posted 2 patches 1 week, 4 days ago
There is a newer version of this series
.../bindings/arm/qcom,coresight-ctcu.yaml          |    1 +
arch/arm64/boot/dts/qcom/shikra.dtsi               | 1298 ++++++++++++++++++++
2 files changed, 1299 insertions(+)
[PATCH 0/2] Add CoreSight nodes for Qualcomm Shikra SoC
Posted by Jie Gan 1 week, 4 days ago
This series adds the CoreSight debug and trace subsystem for the
Qualcomm Shikra SoC.

The first patch adds a fallback compatible for the Shikra CTCU (CoreSight
Trace Control Unit). The CTCU on Shikra shares the same configuration as
the one on SA8775p, so "qcom,shikra-ctcu" falls back to the existing
"qcom,sa8775p-ctcu" compatible.

The second patch adds the DT nodes describing the CoreSight topology on
Shikra, including the funnels, replicators, TMC sinks (ETR/ETF), STM,
per-core ETMs, CTIs, and the TPDM/TPDA trace collection blocks, along
with the CTCU and the dummy source/sink endpoints that model external
trace sources and the EUD sink.

Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
---
Jie Gan (2):
      dt-bindings: arm: add CTCU device for shikra
      arm64: dts: qcom: shikra: Add coresight nodes

 .../bindings/arm/qcom,coresight-ctcu.yaml          |    1 +
 arch/arm64/boot/dts/qcom/shikra.dtsi               | 1298 ++++++++++++++++++++
 2 files changed, 1299 insertions(+)
---
base-commit: 49362394dad7df66c274c867a271394c10ca2bb8
change-id: 20260714-add-coresight-nodes-for-shikra-fffa261ead64

Best regards,
-- 
Jie Gan <jie.gan@oss.qualcomm.com>