On Mon, 13 Jul 2026 11:40:41 +0300
Antoniu Miclaus <antoniu.miclaus@analog.com> wrote:
> The AD408X AXI core can pack sample data on the bus using different word
> widths (20-bit, 16-bit and 14-bit), selected through the packet format
> field of the CNTRL_3 register. Until now this was left at its default,
> which only matched the AD4080 20-bit resolution.
>
> This series exposes the packet format through a new data_size_set backend
> operation and has the ad4080 driver program it during channel setup based
> on the channel resolution, so the bus packing always matches the device
> realbits.
>
> Patch 1 adds the data_size_set operation to the adi-axi-adc backend.
> Patch 2 calls iio_backend_data_size_set() from the ad4080 channel setup.
>
> Link: https://analogdevicesinc.github.io/hdl/library/axi_ad408x/index.html
Hi Antoniu
B4 noticed you'd missed David's tag for this version. So all worked out
fine in the end but please make sure to carry those forward.
I've applied this to the fixes-togreg branch of iio.git.
Thanks
Jonathan
>
> Changes since v1:
> - Patch 2: expand the commit message to describe which parts were
> affected by the wrong packet format, and added a Fixes tag.
>
> Antoniu Miclaus (2):
> iio: adc: adi-axi-adc: add data size support for AD408X backend
> iio: adc: ad4080: configure backend data size
>
> drivers/iio/adc/ad4080.c | 5 +++++
> drivers/iio/adc/adi-axi-adc.c | 30 ++++++++++++++++++++++++++++++
> 2 files changed, 35 insertions(+)
>