perf capstone: Fix build with Capstone versions before 6

[PATCH] perf capstone: Fix build with Capstone versions before 6

Posted by Leo Yan 1 week, 5 days ago

The commit 12c4737f55f2 ("perf capstone: Determine architecture from
e_machine") added a RISC-V mapping for Capstone disassembly.

However, the RISC-V arch and mode definitions are only available from
Capstone 6.0.0. Older Capstone headers do not define CS_ARCH_RISCV,
CS_MODE_RISCV64 or CS_MODE_RISCV32, so perf fails to build.

Guard the RISC-V mapping with a Capstone major version check. Also use
CS_MODE_RISCV_C instead of CS_MODE_RISCVC, which is the mode name used
by Capstone 6.

Fixes: 12c4737f55f2 ("perf capstone: Determine architecture from e_machine")
Signed-off-by: Leo Yan <leo.yan@arm.com>
---
 tools/perf/util/capstone.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/tools/perf/util/capstone.c b/tools/perf/util/capstone.c
index 9bba78ee0c5a2e6c86a97ffe69ca4db966bafd9b..99efeb40ed03621e781ef9b888321e28d237a0ca 100644
--- a/tools/perf/util/capstone.c
+++ b/tools/perf/util/capstone.c
@@ -182,10 +182,12 @@ static bool e_machine_to_capstone(uint16_t e_machine, bool is64, bool is_big_end
 		*arch = CS_ARCH_SPARC;
 		*mode |= CS_MODE_V9;
 		return true;
+#if defined(CS_VERSION_MAJOR) && CS_VERSION_MAJOR >= 6
 	case EM_RISCV:
 		*arch = CS_ARCH_RISCV;
-		*mode |= (is64 ? CS_MODE_RISCV64 : CS_MODE_RISCV32) | CS_MODE_RISCVC;
+		*mode |= (is64 ? CS_MODE_RISCV64 : CS_MODE_RISCV32) | CS_MODE_RISCV_C;
 		return true;
+#endif
 	default:
 		return false;
 	}

---
base-commit: ef3af1df4f3372bd8ad47619452a283048b3bc8d
change-id: 20260713-perf_fix_capstone_build-510dc3bfecfb

Best regards,
-- 
Leo Yan <leo.yan@arm.com>

Re: [PATCH] perf capstone: Fix build with Capstone versions before 6

Posted by Namhyung Kim 1 week, 5 days ago

On Mon, Jul 13, 2026 at 12:08:35PM +0100, Leo Yan wrote:
> The commit 12c4737f55f2 ("perf capstone: Determine architecture from
> e_machine") added a RISC-V mapping for Capstone disassembly.
> 
> However, the RISC-V arch and mode definitions are only available from
> Capstone 6.0.0. Older Capstone headers do not define CS_ARCH_RISCV,
> CS_MODE_RISCV64 or CS_MODE_RISCV32, so perf fails to build.
> 
> Guard the RISC-V mapping with a Capstone major version check. Also use
> CS_MODE_RISCV_C instead of CS_MODE_RISCVC, which is the mode name used
> by Capstone 6.

Please see

https://lore.kernel.org/r/20260706234836.815254-1-namhyung@kernel.org

Thanks,
Namhyung

> 
> Fixes: 12c4737f55f2 ("perf capstone: Determine architecture from e_machine")
> Signed-off-by: Leo Yan <leo.yan@arm.com>
> ---
>  tools/perf/util/capstone.c | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/tools/perf/util/capstone.c b/tools/perf/util/capstone.c
> index 9bba78ee0c5a2e6c86a97ffe69ca4db966bafd9b..99efeb40ed03621e781ef9b888321e28d237a0ca 100644
> --- a/tools/perf/util/capstone.c
> +++ b/tools/perf/util/capstone.c
> @@ -182,10 +182,12 @@ static bool e_machine_to_capstone(uint16_t e_machine, bool is64, bool is_big_end
>  		*arch = CS_ARCH_SPARC;
>  		*mode |= CS_MODE_V9;
>  		return true;
> +#if defined(CS_VERSION_MAJOR) && CS_VERSION_MAJOR >= 6
>  	case EM_RISCV:
>  		*arch = CS_ARCH_RISCV;
> -		*mode |= (is64 ? CS_MODE_RISCV64 : CS_MODE_RISCV32) | CS_MODE_RISCVC;
> +		*mode |= (is64 ? CS_MODE_RISCV64 : CS_MODE_RISCV32) | CS_MODE_RISCV_C;
>  		return true;
> +#endif
>  	default:
>  		return false;
>  	}
> 
> ---
> base-commit: ef3af1df4f3372bd8ad47619452a283048b3bc8d
> change-id: 20260713-perf_fix_capstone_build-510dc3bfecfb
> 
> Best regards,
> -- 
> Leo Yan <leo.yan@arm.com>
>

Re: [PATCH] perf capstone: Fix build with Capstone versions before 6

Posted by Leo Yan 1 week, 5 days ago

Hi Namhyung,

On Mon, Jul 13, 2026 at 10:39:57AM -0700, Namhyung Kim wrote:
> On Mon, Jul 13, 2026 at 12:08:35PM +0100, Leo Yan wrote:
> > The commit 12c4737f55f2 ("perf capstone: Determine architecture from
> > e_machine") added a RISC-V mapping for Capstone disassembly.
> > 
> > However, the RISC-V arch and mode definitions are only available from
> > Capstone 6.0.0. Older Capstone headers do not define CS_ARCH_RISCV,
> > CS_MODE_RISCV64 or CS_MODE_RISCV32, so perf fails to build.
> > 
> > Guard the RISC-V mapping with a Capstone major version check. Also use
> > CS_MODE_RISCV_C instead of CS_MODE_RISCVC, which is the mode name used
> > by Capstone 6.
> 
> Please see
> 
> https://lore.kernel.org/r/20260706234836.815254-1-namhyung@kernel.org

I am a bit concerned that defining the macros directly in perf is a good
idea, since the Capstone library doesn't actually support the arch/insn
and the macros merely work around the build.

Perhaps checking the Capstone version would be a safer approach?

I have no knowledge for capstone, I will leave this to you to decide which
is better. I tested your patch, which works well at my side.

Thanks,
Leo

> > Fixes: 12c4737f55f2 ("perf capstone: Determine architecture from e_machine")
> > Signed-off-by: Leo Yan <leo.yan@arm.com>
> > ---
> >  tools/perf/util/capstone.c | 4 +++-
> >  1 file changed, 3 insertions(+), 1 deletion(-)
> > 
> > diff --git a/tools/perf/util/capstone.c b/tools/perf/util/capstone.c
> > index 9bba78ee0c5a2e6c86a97ffe69ca4db966bafd9b..99efeb40ed03621e781ef9b888321e28d237a0ca 100644
> > --- a/tools/perf/util/capstone.c
> > +++ b/tools/perf/util/capstone.c
> > @@ -182,10 +182,12 @@ static bool e_machine_to_capstone(uint16_t e_machine, bool is64, bool is_big_end
> >  		*arch = CS_ARCH_SPARC;
> >  		*mode |= CS_MODE_V9;
> >  		return true;
> > +#if defined(CS_VERSION_MAJOR) && CS_VERSION_MAJOR >= 6
> >  	case EM_RISCV:
> >  		*arch = CS_ARCH_RISCV;
> > -		*mode |= (is64 ? CS_MODE_RISCV64 : CS_MODE_RISCV32) | CS_MODE_RISCVC;
> > +		*mode |= (is64 ? CS_MODE_RISCV64 : CS_MODE_RISCV32) | CS_MODE_RISCV_C;
> >  		return true;
> > +#endif
> >  	default:
> >  		return false;
> >  	}
> > 
> > ---
> > base-commit: ef3af1df4f3372bd8ad47619452a283048b3bc8d
> > change-id: 20260713-perf_fix_capstone_build-510dc3bfecfb
> > 
> > Best regards,
> > -- 
> > Leo Yan <leo.yan@arm.com>
> >

Re: [PATCH] perf capstone: Fix build with Capstone versions before 6

Posted by Namhyung Kim 1 week, 5 days ago

On Mon, Jul 13, 2026 at 07:21:33PM +0100, Leo Yan wrote:
> Hi Namhyung,
> 
> On Mon, Jul 13, 2026 at 10:39:57AM -0700, Namhyung Kim wrote:
> > On Mon, Jul 13, 2026 at 12:08:35PM +0100, Leo Yan wrote:
> > > The commit 12c4737f55f2 ("perf capstone: Determine architecture from
> > > e_machine") added a RISC-V mapping for Capstone disassembly.
> > > 
> > > However, the RISC-V arch and mode definitions are only available from
> > > Capstone 6.0.0. Older Capstone headers do not define CS_ARCH_RISCV,
> > > CS_MODE_RISCV64 or CS_MODE_RISCV32, so perf fails to build.
> > > 
> > > Guard the RISC-V mapping with a Capstone major version check. Also use
> > > CS_MODE_RISCV_C instead of CS_MODE_RISCVC, which is the mode name used
> > > by Capstone 6.
> > 
> > Please see
> > 
> > https://lore.kernel.org/r/20260706234836.815254-1-namhyung@kernel.org
> 
> I am a bit concerned that defining the macros directly in perf is a good
> idea, since the Capstone library doesn't actually support the arch/insn
> and the macros merely work around the build.

Yep, the goal is to avoid build errors.  Actually it'll fail at runtime
and fallback to other libraries when it tries to use on RISC-V.  But I
think it should continue to support old capstones on supported archs.

> 
> Perhaps checking the Capstone version would be a safer approach?

I'm not sure.  IIUC RISC-V support was added to v5.0 and CS_MODE_RISCV_C
was changed before v6.0 is out.  Do you build capstone from source or
use a packaged version?

> 
> I have no knowledge for capstone, I will leave this to you to decide which
> is better. I tested your patch, which works well at my side.

Thanks for the test!

Namhyung

Re: [PATCH] perf capstone: Fix build with Capstone versions before 6

Posted by Leo Yan 1 week, 4 days ago

On Mon, Jul 13, 2026 at 01:53:55PM -0700, Namhyung Kim wrote:

[...]

> > Perhaps checking the Capstone version would be a safer approach?
> 
> I'm not sure.  IIUC RISC-V support was added to v5.0 and CS_MODE_RISCV_C
> was changed before v6.0 is out.  Do you build capstone from source or
> use a packaged version?

I checked Capstone source for two RISCV commits:

  ec6428f9 Refactoring the RISCV architecture to Auto-Sync on LLVM (#2756)
  b8fcf27b RISCV support ISRV32/ISRV64 (#1401)

  $ git describe --contains ec6428f92
  6.0.0-Alpha7~10
  $ git describe --contains b8fcf27b2
  6.0.0-Alpha1~513

This is why I concluded that v6.0 is the version start to support. I did
not build capstone from scratch but just use a packaged version.

Just remind, CS_MODE_RISCVC might break build when you work with the
latest Capstone, as it has been renamed to CS_MODE_RISCV_C.

Thanks,
Leo

Re: [PATCH] perf capstone: Fix build with Capstone versions before 6

Posted by Namhyung Kim 1 week, 4 days ago

On Tue, Jul 14, 2026 at 09:36:52AM +0100, Leo Yan wrote:
> On Mon, Jul 13, 2026 at 01:53:55PM -0700, Namhyung Kim wrote:
> 
> [...]
> 
> > > Perhaps checking the Capstone version would be a safer approach?
> > 
> > I'm not sure.  IIUC RISC-V support was added to v5.0 and CS_MODE_RISCV_C
> > was changed before v6.0 is out.  Do you build capstone from source or
> > use a packaged version?
> 
> I checked Capstone source for two RISCV commits:
> 
>   ec6428f9 Refactoring the RISCV architecture to Auto-Sync on LLVM (#2756)
>   b8fcf27b RISCV support ISRV32/ISRV64 (#1401)
> 
>   $ git describe --contains ec6428f92
>   6.0.0-Alpha7~10
>   $ git describe --contains b8fcf27b2
>   6.0.0-Alpha1~513

I'm curious what `git tag --contains` would say.  I can see RISCV in the
5.0 source code.

https://github.com/capstone-engine/capstone/blob/5.0/include/capstone/capstone.h#L90

> 
> This is why I concluded that v6.0 is the version start to support. I did
> not build capstone from scratch but just use a packaged version.

What's your version?

> 
> Just remind, CS_MODE_RISCVC might break build when you work with the
> latest Capstone, as it has been renamed to CS_MODE_RISCV_C.

Yep.  https://github.com/capstone-engine/capstone/issues/2977

Thanks,
Namhyung