From: bui duc phuc <phucduc.bui@gmail.com>
Hi all,
The FSI on r8a7740 requires the SPU clock to be enabled before accessing
its internal registers. Without it, register accesses may hang the system
even when the FSI functional clock is enabled.
Previously, the SPU clock remained enabled because it was left running by
the bootloader. After adding the SPU clock to the device tree, it is
automatically disabled once system initialization completes.
This series adds the missing clocks and aligns their names with those used
by the driver.
Following feedback from Morimoto-san, the driver is also refactored to
improve stability. Clock initialization is moved from the runtime path to
the probe function to simplify the flow and avoid redundant setup.
Additionally, the shutdown sequence is reordered to ensure the stream is
stopped before the hardware is shut down.
The driver currently uses clk_enable()/clk_disable() without matching
clk_prepare()/clk_unprepare() handling. This series adds the missing
prepare/unprepare operations and moves them into startup/shutdown paths,
since clk_prepare() may sleep and therefore must not be called from
atomic contexts.
The series also fixes a race where in-flight IRQ handlers may continue
accessing registers after the SPU clock has been disabled during shutdown.
Changes in v6:
- Add Acked-by tag from Kuninori Morimoto.
- DT binding updates (drop uniqueItems, commit message).
- Improve probe and clock error handling.
- Small improvements in clock handling paths.
Changes in v5:
- Drop spu_count and rely on the clk core for clock reference counting.
- Reorder the patch series as suggested by Morimoto-san.
- Update the probe error handling path to ensure proper cleanup on
failure.
Changes in v4:
- use fsi_stream_is_working() for Fixed a race where in-flight IRQ
handlers following Morimoto-san's suggestions
- Handle the return value of fsi_clk_init() to properly support deferred
probe, as suggested by Mark.
- Split the clock refactoring into a devm cleanup patch and a refactor
patch, as suggested by Morimoto-san.
- Update dt-bindings based on feedback from Krzysztof, Rob, and Geert.
Changes in v3:
- Reordered the patches following Morimoto-san's suggestions
- Updated the DT bindings based on Geert's feedback and renamed the
"own" clock to "fck"
- Added fsi_clk_prepare()/fsi_clk_unprepare() and moved them into
dai_startup()/dai_shutdown()
- Fixed a race where in-flight IRQ handlers could continue accessing
registers after the SPU clock had been disabled
Changes in v2:
- DT Bindings:
Define "own" clock and add "spu", "icka/b", "diva/b", "xcka/b" to the
clock tree.
Use YAML anchors and "if" rules to enforce clock-names and r8a7740
requirements.
Relocate allOf block and update example with full 8-clock configuration.
- DTS:
Rename "fsi" clock to "own" to match driver implementation.
Add missing clock names: "icka", "ickb", "diva", "divb", "xcka", "xckb".
- In the driver:
Refactor clock initialization.
Reorder shutdown: stop stream before hardware shutdown.
Move SPU clock enable/disable handling to fsi_hw_startup/shutdown.
v5 links:
https://lore.kernel.org/all/20260609013107.5995-1-phucduc.bui@gmail.com/
v4 links:
https://lore.kernel.org/all/20260605121955.105661-1-phucduc.bui@gmail.com/
v3 links:
https://lore.kernel.org/all/20260510084303.122426-1-phucduc.bui@gmail.com/
v2 links:
https://lore.kernel.org/all/20260413100700.30995-1-phucduc.bui@gmail.com/
v1 links :
https://lore.kernel.org/all/20260403112655.167593-1-phucduc.bui@gmail.com/
Testing:
- Verified on r8a7740 (Armadillo-800EVA): FSI slave / Codec master mode.
The system no longer hangs. aplay works correctly, while arecord has
some noise in the recorded file (this likely needs further tuning, but
it is not part of this patch series).
- FSI master mode is currently compile-tested only. Full verification
requires a dedicated HDMI driver (FSIB) or hardware modifications
(resoldering board resistors) (FSIA).
- Youtube video link of the test process (from v3 verification):
https://youtu.be/w3H4v5djr7M
Best regards,
Phuc
bui duc phuc (11):
ASoC: dt-bindings: renesas,fsi: add support multiple clocks
ARM: dts: renesas: r8a7740: Add clocks for FSI
ASoC: renesas: fsi: Fix trigger stop ordering
ASoC: renesas: fsi: Move fsi_stream_is_working()
ASoC: renesas: fsi: Fix register access from in-flight IRQ after
shutdown
ASoC: renesas: fsi: Move fsi_clk_init()
ASoC: renesas: fsi: Use devm_clk_get_optional() for optional clocks
ASoC: renesas: fsi: refactor clock initialization
ASoC: renesas: fsi: Add SPU clock support
ASoC: renesas: fsi: add fsi_clk_prepare/unprepare()
ASoC: renesas: fsi: Add SPU clock control in hw_startup/shutdown
.../bindings/sound/renesas,fsi.yaml | 60 +++-
arch/arm/boot/dts/renesas/r8a7740.dtsi | 12 +-
sound/soc/renesas/fsi.c | 267 ++++++++++++------
3 files changed, 244 insertions(+), 95 deletions(-)
--
2.43.0