This is a follow-up to "cxl/pci: Convert PCIBIOS errors to errno on
DVSEC config accesses". After that series landed by Dave Jiang, I
continued auditing the CXL code for PCI config accessors that propagate
positive PCIBIOS_* status codes where callers expect negative errnos,
and found a few more spots.

Patch 1 converts the remaining DVSEC and PCIe capability accesses in
update_gpf_port_dvsec() and the dport setup path that returned the raw
PCIBIOS status to callers testing for failure.

Patch 2 fixes __cxl_find_regblock_instance(), which ignored the
pci_read_config_dword() return value entirely. On a failed config read
the raw accessor leaves PCI_ERROR_RESPONSE (~0) in the destination, so
the code computed a bogus regblock count and decoded register block
addresses from garbage. Check the return value and convert it.

Richard Cheng (2):
  cxl: Convert PCIBIOS errors to errno on remaining DVSEC/PCIe accesses
  cxl/core/regs: Check return value of DVSEC register locator reads

 drivers/cxl/core/pci.c  |  2 +-
 drivers/cxl/core/regs.c | 14 ++++++++++----
 drivers/cxl/port.c      |  2 +-
 3 files changed, 12 insertions(+), 6 deletions(-)


base-commit: 26aa60e0276272ae61b843a05a91748dcb1130f9
-- 
2.43.0