Control dependencies do not guarantee load order across the condition,
allowing a CPU to predict and speculate memory reads.

Add a dma read barrier before reading the complete SMID entry in
structure reply_des and after the condition its contents depend on to
ensure the read order is determinsitic.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
---
 drivers/scsi/megaraid/megaraid_sas_fusion.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/scsi/megaraid/megaraid_sas_fusion.c b/drivers/scsi/megaraid/megaraid_sas_fusion.c
index 2699e4e09b5b..6ec6e5fa71ce 100644
--- a/drivers/scsi/megaraid/megaraid_sas_fusion.c
+++ b/drivers/scsi/megaraid/megaraid_sas_fusion.c
@@ -3589,6 +3589,8 @@ complete_cmd_fusion(struct megasas_instance *instance, u32 MSIxIndex,
 	while (d_val.u.low != cpu_to_le32(UINT_MAX) &&
 	       d_val.u.high != cpu_to_le32(UINT_MAX)) {
 
+		/* Read SIMD after ReplyFlags and d_val.word check */
+		dma_rmb();
 		smid = le16_to_cpu(reply_desc->SMID);
 		cmd_fusion = fusion->cmd_list[smid - 1];
 		scsi_io_req = (struct MPI2_RAID_SCSI_IO_REQUEST *)

base-commit: e8c2f9fdadee7cbc75134dc463c1e0d856d6e5c7
-- 
2.39.3