Hi,
Introduce a centralized x86 CPUID model, tables, and API.
Rationale for this work can be found at:
https://lore.kernel.org/lkml/874ixernra.ffs@tglx
https://gitlab.com/x86-cpuid.org/x86-cpuid-db
Refactor and convert ~85% of the kernel CPUID call sites to the model.
By the end of this series, route all X86_FEATURE queries to the CPUID
tables and remove x86_capability[].
Please note that the top 6 patches are already in tip:x86/cpu. They are
here to keep a clean queue over -rc5 so that the bots can do their work.
Special thanks to Maciej for testing the previous iteration.
The series is divided as:
# Header disentanglement (<asm/processor.h> <==> <asm/cpuid/api.h>)
1 treewide: Explicitly include the x86 CPUID headers
2 x86/cpu: <asm/processor.h>: Do not include the CPUID API header
3 x86/cpuid: Rename cpuid_leaf()/cpuid_subleaf() APIs
# CPUID Model
4 x86/cpuid: Introduce <asm/cpuid/leaf_types.h>
5 x86/cpu: Introduce a centralized CPUID data model
6 x86/cpuid: Introduce a centralized CPUID parser
7 x86/cpu: centaur/zhaoxin: Rescan CPUID(0xc0000001) after MSR writes
8 x86/cpu/transmeta: Rescan CPUID(0x1) after capability unhide
# CPUID(0x0), CPUID(0x1), CPUID(0x80000000), CPUID(0x8000000[234])
9 x86/cpu: Use parsed CPUID(0x0)
10 x86/lib: Add CPUID(0x1) family and model calculation
11 x86/cpu: Use parsed CPUID(0x1)
12 x86/cpuid: Parse CPUID(0x80000000)
13 x86/cpu: Use parsed CPUID(0x80000000)
14 x86/cpuid: Parse CPUID(0x80000002) to CPUID(0x80000004)
15 x86/cpu: Use parsed CPUID(0x80000002) to CPUID(0x80000004)
# CPUID Model: x86 vendor discernment + debugfs support
16 x86/cpuid: Split parser tables and add vendor-qualified parsing
17 x86/cpuid: Introduce a parser debugfs interface
# CPUID(0x16), Transmeta CPUID(0x8086000[0123456]), Centaur CPUID(0xc000000[01])
18 x86/cpuid: Parse CPUID(0x16)
19 x86/tsc: Use parsed CPUID(0x16)
20 x86/cpuid: Parse Transmeta and Centaur extended ranges
21 x86/cpu/transmeta: Use parsed CPUID(0x80860000)->CPUID(0x80860006)
22 x86/cpu/transmeta: Refactor CPU information printing
23 x86/cpu/centaur: Use parsed CPUID(0xc0000001)
24 x86/cpu/zhaoxin: Use parsed CPUID(0xc0000001)
# Intel cache descriptors; CPUID(0x2)
25 x86/cpuid: Parse CPUID(0x2)
26 x86/cpuid: Warn once on invalid CPUID(0x2) iteration count
27 x86/cpuid: Introduce parsed CPUID(0x2) API
28 x86/cpu: Use parsed CPUID(0x2)
29 x86/cacheinfo: Use parsed CPUID(0x2)
30 x86/cpuid: Remove direct CPUID(0x2) query helpers
# Intel/AMD deterministic cache; CPUID(0x4), CPUID(0x8000001d)
31 x86/cpuid: Parse deterministic cache parameters CPUID leaves
32 x86/cacheinfo: Pass a 'struct cpuinfo_x86' reference to CPUID(0x4) code
33 x86/cacheinfo: Use parsed CPUID(0x4)
34 x86/cacheinfo: Use parsed CPUID(0x8000001d)
# Cache/TLB/mm info; CPUID(0x8000000[568])
35 x86/cpuid: Parse CPUID(0x80000005), CPUID(0x80000006), CPUID(0x80000008)
36 x86/cacheinfo: Use auto-generated data types
37 x86/cacheinfo: Use parsed CPUID(0x80000005) and CPUID(0x80000006)
38 x86/cacheinfo: Use parsed CPUID(0x80000006)
39 x86/cpu: Use parsed CPUID(0x80000005) and CPUID(0x80000006)
40 x86/cpu/amd: Use parsed CPUID(0x80000005)
41 x86/cpu/amd: Refactor TLB detection code
42 x86/cpu/amd: Use parsed CPUID(0x80000005) and CPUID(0x80000006)
43 x86/cpu/hygon: Use parsed CPUID(0x80000005) and CPUID(0x80000006)
44 x86/cpu/centaur: Use parsed CPUID(0x80000005)
45 x86/cpu: Use parsed CPUID(0x80000008)
# Remaining CPUID(0x1) sites
46 x86/apic: Use parsed and refreshed CPUID(0x1)
47 x86/cpu/amd: Refactor CPUID(0x1) level calculation
48 x86/mce: core: Use parsed CPUID(0x1)
49 x86/mce: inject: Use parsed CPUID(0x1)
50 x86/microcode/amd: Use standard CPUID(0x1) types
51 x86/microcode/amd: rdrand: Use standard CPUID(0x1) types
52 x86/microcode/intel: Explain CPUID parser APIs unavailability
53 x86/mm/pti: Use standard CPUID(0x1) types
54 x86/xen: Use parsed CPUID(0x1)
55 x86/xen: Use standard CPUID(0x1) types
56 agp/efficeon: Use parsed CPUID(0x1)
57 dmaengine: ioatdma: Remove custom UP local APID IC code
58 RAS/AMD/FMPM: Use parsed CPUID(0x1)
# MONITOR/MWAIT: CPUID(0x5)
59 x86/cpuid: Parse CPUID(0x5)
60 x86/acpi/cstate: Remove superfluous retval logic
61 x86/acpi/cstate: Clarify unsupported MWAIT hint warning
62 x86/acpi/cstate: Use MWAIT helper macros
63 x86/acpi: Use parsed CPUID(0x5)
64 x86/process: Use parsed CPUID(0x5)
65 x86/hpet: Use parsed CPUID(0x5)
66 ACPI: PAD: Use Parsed CPUID(0x5)
67 intel_idle: Use parsed CPUID(0x5)
68 x86/idle: Remove unused CPUID(0x5) symbols
# Misc: CPUID(0x6), CPUID(0x9), CPUID(0x15)
69 x86/cpuid: Parse CPUID(0x6), CPUID(0x9), and CPUID(0x15)
70 thermal: intel: hfi: Use parsed CPUID(0x6)
71 dmaengine: ioatdma: Use parsed CPUID(0x9)
72 ASoC: Intel: avs: Use parsed CPUID(0x15)
73 perf/x86/intel: Use parsed CPUID(0x15)
# Intel SGX: CPUID(0x12)
74 x86/cpuid: Introduce cpuid_subleaf_raw()
75 x86/cpuid: Parse CPUID(0x12)
76 x86/sgx/driver: Use parsed CPUID(0x12)
77 x86/sgx: Use parsed CPUID(0x12)
78 KVM: x86: Use parsed CPUID(0x12)
79 KVM: VMX: Use standard CPUID(0x12) types
80 x86/sgx: Move unused CPUID(0x12) symbols
# Perfmon: CPUID(0xa), CPUID(0x1c), CPUID(0x23), CPUID(0x80000022)
81 x86/cpuid: Parse CPUID(0xa) and CPUID(0x1c)
82 x86/cpu/intel: Use parsed CPUID(0xa)
83 x86/cpu/centaur: Use parsed CPUID(0xa)
84 x86/cpu/zhaoxin: Use parsed CPUID(0xa)
85 perf/x86/intel: Use parsed CPUID(0xa)
86 perf/x86/zhaoxin: Use parsed CPUID(0xa)
87 x86/xen: Use parsed CPUID(0xa)
88 KVM: x86: Use standard CPUID(0xa) types
89 KVM: x86/pmu: Use standard CPUID(0xa) types
90 perf/x86: Remove custom CPUID(0xa) types
91 perf/x86/lbr: Use parsed CPUID(0x1c)
92 perf/x86/lbr: Remove custom CPUID(0x1c) types
93 x86/cpuid: Parse CPUID(0x23)
94 perf/x86/intel: Use parsed per-CPU CPUID(0x23)
95 perf/x86/intel: Remove custom CPUID(0x23) types
96 x86/cpuid: Parse CPUID(0x80000022)
97 perf/x86/amd/lbr: Use parsed CPUID(0x80000022)
98 perf/x86/amd: Use parsed CPUID(0x80000022)
99 KVM: x86: Use standard CPUID(0x80000022) types
100 perf/x86: Remove custom CPUID(0x80000022) types
# Power management flags: CPUID(0x80000007).EBX
101 x86/cpuid: Parse CPUID(0x80000007)
102 x86/cpu: Use parsed CPUID(0x80000007)
103 x86/cpu: amd/hygon: Use parsed CPUID(0x80000007)
104 x86/cpu: cpuinfo: Use parsed CPUID(0x80000007)
105 KVM: x86: Use parsed CPUID(0x80000007)
# CPUID Model: X86_FEATURE routing
106 x86/microcode: Allocate cpuinfo_x86 snapshots on the heap
107 x86/cpuid: Parse leaves backing X86_FEATURE words
108 x86/cpuid: Parse Linux synthetic CPUID leaves
109 x86/cpuid: Introduce a compile-time X86_FEATURE word map
110 x86/cpuid: Introduce X86_FEATURE and CPUID word APIs
111 x86/percpu: Add offset argument to x86_this_cpu_test_bit()
112 x86/cpufeature: Factor out a __static_cpu_has() helper
113 x86/asm/32: Cache CPUID(0x1).EDX in cpuid_table
114 x86: Route all feature queries to the CPUID tables
# cpuinfo_x86::x86_capability[] Removal
115 x86/cpu: Remove x86_capability[] and x86_power initialization
116 x86/cpu/transmeta: Remove x86_capability[] CPUID initialization
117 x86/cpu: centaur/zhaoxin: Remove x86_capability[] initialization
118 KVM: x86: Remove BUILD_BUG_ON() x86_capability[] check
119 x86/cpu: Remove x86_capability[] and x86_power
# Finally
120 MAINTAINERS: Extend x86 CPUID DATABASE file coverage
Changelogs
==========
* v7
- Per Boris feedback, drop for now the legacy sites CPUID table rescans
- Fix the wording issues pointed by Maciej
- Convert all remaining CPUID(0x1) sites
- Convert CPUID(0x5), CPUID(0x6), CPUID(0x9), and CPUID(0x12) sites
* Previous iterations changelogs
- https://lore.kernel.org/lkml/20260327021645.555257-1-darwi@linutronix.de
- https://lore.kernel.org/lkml/20250905121515.192792-1-darwi@linutronix.de
Thank you,
Ahmed
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base-commit: e7ae89a0c97ce2b68b0983cd01eda67cf373517d
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2.54.0