[PATCH v6 00/18] Renesas: dmaengine and ASoC fixes

Claudiu Beznea posted 18 patches 1 week, 6 days ago
drivers/dma/sh/rz-dmac.c   | 823 ++++++++++++++++++++++++++-----------
sound/soc/renesas/Kconfig  |   1 +
sound/soc/renesas/rz-ssi.c | 399 +++++++-----------
3 files changed, 723 insertions(+), 500 deletions(-)
[PATCH v6 00/18] Renesas: dmaengine and ASoC fixes
Posted by Claudiu Beznea 1 week, 6 days ago
From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>

Hi,

This series addresses issues identified in the DMA engine and RZ SSI
drivers.

As described in the patch "dmaengine: sh: rz-dmac: Set the Link End (LE)
bit on the last descriptor", stress testing on the Renesas RZ/G2L SoC
showed that starting all available DMA channels could cause the system
to stall after several hours of operation. This issue was resolved by
setting the Link End bit on the last descriptor of a DMA transfer.

However, after applying that fix, the SSI audio driver began to suffer
from frequent overruns and underruns. This was caused by the way the SSI
driver emulated cyclic DMA transfers: at the start of playback/capture
it initially enqueued 4 DMA descriptors as single SG transfers, and upon
completion of each descriptor, a new one was enqueued. Since there was
no indication to the DMA hardware where the descriptor list ended
(though the LE bit), the DMA engine continued transferring until the
audio stream was stopped. From time to time, audio signal spikes were
observed in the recorded file with this approach.

To address these issue, cyclic DMA support was added to the DMA engine
driver, and the SSI audio driver was reworked to use this support via
the generic PCM dmaengine APIs.

Due to the behavior described above, no Fixes tags were added to the
patches in this series, and all patches should be merged through the
same tree.

In case this series will be merged this release cycle, as the audio
patches are acked, best would be to go though the DMA tree.

However, there might be merge conflict on the rz-ssi driver due to the
recently posted patch at [1].

Thank you,
Claudiu

[1] https://lore.kernel.org/all/875x4agb2x.wl-kuninori.morimoto.gx@renesas.com

Changes in v6:
- addressed sashiko review comments
- addressed Frank's review comments
- collected tags

Changes in v5:
- dropped patch "dmaengine: sh: rz-dmac: Do not disable the channel on error"
- added patch "dmaengine: sh: rz-dmac: Add runtime PM support"

Changes in v4:
- collected tags
- addressed review comments got from sashiko.dev. For this:
- added patches:
-- dmaengine: sh: rz-dmac: Move interrupt request after everything is set up
-- dmaengine: sh: rz-dmac: Fix incorrect NULL check on list_first_entry()

Changes in v3:
- addressed review comments got from sashiko.dev. For this:
- added patches 1-9
- added patch "ASoC: renesas: rz-ssi: Add pause support"
- dropped patches:
-- dmaengine: sh: rz-dmac: Add enable status bit
-- dmaengine: sh: rz-dmac: Add pause status bit

Changes in v2:
- fixed typos in patch descriptions and patch titles
- updated "ASoC: renesas: rz-ssi: Use generic PCM dmaengine APIs"
  to fix the PIO mode
- in patch "dmaengine: sh: rz-dmac: Add suspend to RAM support"
  clear the RZ_DMAC_CHAN_STATUS_SYS_SUSPENDED status bit for
  channel w/o RZ_DMAC_CHAN_STATUS_PAUSED_INTERNAL
- per-patch updates can be found in individual patches changelog 
- rebased on top of next-20260319
- updated the cover letter

Claudiu Beznea (18):
  dmaengine: sh: rz-dmac: Move interrupt request after everything is set
    up
  dmaengine: sh: rz-dmac: Fix incorrect NULL check for
    list_first_entry()
  dmaengine: sh: rz-dmac: Use list_first_entry_or_null()
  dmaengine: sh: rz-dmac: Use rz_dmac_disable_hw()
  dmaengine: sh: rz-dmac: Add helper to compute the lmdesc address
  dmaengine: sh: rz-dmac: Save the start LM descriptor
  dmaengine: sh: rz-dmac: Add helper to check if the channel is enabled
  dmaengine: sh: rz-dmac: Add helper to check if the channel is paused
  dmaengine: sh: rz-dmac: Use virt-dma APIs for channel descriptor
    processing
  dmaengine: sh: rz-dmac: Refactor pause/resume code
  dmaengine: sh: rz-dmac: Drop the update of channel->chctrl with
    CHCTRL_SETEN
  dmaengine: sh: rz-dmac: Add cyclic DMA support
  dmaengine: sh: rz-dmac: Adjust rz_dmac_chan_get_residue() to return
    error codes
  dmaengine: sh: rz-dmac: Add runtime PM support
  dmaengine: sh: rz-dmac: Add suspend to RAM support
  ASoC: renesas: rz-ssi: Add pause support
  ASoC: renesas: rz-ssi: Use generic PCM dmaengine APIs
  dmaengine: sh: rz-dmac: Set the Link End (LE) bit on the last
    descriptor

 drivers/dma/sh/rz-dmac.c   | 823 ++++++++++++++++++++++++++-----------
 sound/soc/renesas/Kconfig  |   1 +
 sound/soc/renesas/rz-ssi.c | 399 +++++++-----------
 3 files changed, 723 insertions(+), 500 deletions(-)

-- 
2.43.0
Re: [PATCH v6 00/18] Renesas: dmaengine and ASoC fixes
Posted by Vinod Koul 14 hours ago
On Tue, 26 May 2026 11:46:52 +0300, Claudiu Beznea wrote:
> This series addresses issues identified in the DMA engine and RZ SSI
> drivers.
> 
> As described in the patch "dmaengine: sh: rz-dmac: Set the Link End (LE)
> bit on the last descriptor", stress testing on the Renesas RZ/G2L SoC
> showed that starting all available DMA channels could cause the system
> to stall after several hours of operation. This issue was resolved by
> setting the Link End bit on the last descriptor of a DMA transfer.
> 
> [...]

Applied, thanks!

[01/18] dmaengine: sh: rz-dmac: Move interrupt request after everything is set up
        commit: 731712403ddb39d1a76a11abf339a0615bc85de7
[02/18] dmaengine: sh: rz-dmac: Fix incorrect NULL check for list_first_entry()
        commit: 5fbf3a2a3b96ef5810e6e0fbc601f82067629bc5
[03/18] dmaengine: sh: rz-dmac: Use list_first_entry_or_null()
        commit: 89975baaa9ea2490b75d69842561a32ca888b7e5
[04/18] dmaengine: sh: rz-dmac: Use rz_dmac_disable_hw()
        commit: 38d4d021228386b8e3fbef2bca5f1e91eacd4fe6
[05/18] dmaengine: sh: rz-dmac: Add helper to compute the lmdesc address
        commit: 32a69f1487819766d2084ed32b1350b18f971c10
[06/18] dmaengine: sh: rz-dmac: Save the start LM descriptor
        commit: e21aa306e82067457f2297ae56af4c91db86c59a
[07/18] dmaengine: sh: rz-dmac: Add helper to check if the channel is enabled
        commit: 7a94c109a5def4f0f25705a82ed5870f794ff4ed
[08/18] dmaengine: sh: rz-dmac: Add helper to check if the channel is paused
        commit: 1dddc864dfa844efaf36345eb58b121b2cdffa5f
[09/18] dmaengine: sh: rz-dmac: Use virt-dma APIs for channel descriptor processing
        commit: daa6d4617bee722e83f7d8584416e83b709c958a
[10/18] dmaengine: sh: rz-dmac: Refactor pause/resume code
        commit: dc86e47ca9b1021e258c366a5a9aa15d71c814a5
[11/18] dmaengine: sh: rz-dmac: Drop the update of channel->chctrl with CHCTRL_SETEN
        commit: e8baee1d1cddc8e2be7bc362d6dc3fcb2021e873
[12/18] dmaengine: sh: rz-dmac: Add cyclic DMA support
        commit: 172bfb57481c65fcc94ebcae3a730f6df2f953d4
[13/18] dmaengine: sh: rz-dmac: Adjust rz_dmac_chan_get_residue() to return error codes
        commit: 16ba40151b1e6a52b28296a2173457bc6c31f022
[14/18] dmaengine: sh: rz-dmac: Add runtime PM support
        commit: 7c27a4d54d48d0774518390e4ce6cf3309aac141
[15/18] dmaengine: sh: rz-dmac: Add suspend to RAM support
        commit: c13ce43e70719dead7009e7e708971ba1c447568
[16/18] ASoC: renesas: rz-ssi: Add pause support
        commit: b4d34819a53964648bc53cabaa3ba9890d4fdf9c
[17/18] ASoC: renesas: rz-ssi: Use generic PCM dmaengine APIs
        commit: 9fcaec81ac56c9d2c5d779ffb5a76b622b4d0590
[18/18] dmaengine: sh: rz-dmac: Set the Link End (LE) bit on the last descriptor
        commit: cd2d36e8ae61832aaac3bddf5aafdab72821e6b9

Best regards,
-- 
~Vinod
Re: [PATCH v6 00/18] Renesas: dmaengine and ASoC fixes
Posted by Claudiu Beznea 6 days, 7 hours ago
Hi,

Gentle ping on this series.

Thank you,
Claudiu

On 5/26/26 11:46, Claudiu Beznea wrote:
> From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
> 
> Hi,
> 
> This series addresses issues identified in the DMA engine and RZ SSI
> drivers.
> 
> As described in the patch "dmaengine: sh: rz-dmac: Set the Link End (LE)
> bit on the last descriptor", stress testing on the Renesas RZ/G2L SoC
> showed that starting all available DMA channels could cause the system
> to stall after several hours of operation. This issue was resolved by
> setting the Link End bit on the last descriptor of a DMA transfer.
> 
> However, after applying that fix, the SSI audio driver began to suffer
> from frequent overruns and underruns. This was caused by the way the SSI
> driver emulated cyclic DMA transfers: at the start of playback/capture
> it initially enqueued 4 DMA descriptors as single SG transfers, and upon
> completion of each descriptor, a new one was enqueued. Since there was
> no indication to the DMA hardware where the descriptor list ended
> (though the LE bit), the DMA engine continued transferring until the
> audio stream was stopped. From time to time, audio signal spikes were
> observed in the recorded file with this approach.
> 
> To address these issue, cyclic DMA support was added to the DMA engine
> driver, and the SSI audio driver was reworked to use this support via
> the generic PCM dmaengine APIs.
> 
> Due to the behavior described above, no Fixes tags were added to the
> patches in this series, and all patches should be merged through the
> same tree.
> 
> In case this series will be merged this release cycle, as the audio
> patches are acked, best would be to go though the DMA tree.
> 
> However, there might be merge conflict on the rz-ssi driver due to the
> recently posted patch at [1].
> 
> Thank you,
> Claudiu
> 
> [1] https://lore.kernel.org/all/875x4agb2x.wl-kuninori.morimoto.gx@renesas.com
> 
> Changes in v6:
> - addressed sashiko review comments
> - addressed Frank's review comments
> - collected tags
> 
> Changes in v5:
> - dropped patch "dmaengine: sh: rz-dmac: Do not disable the channel on error"
> - added patch "dmaengine: sh: rz-dmac: Add runtime PM support"
> 
> Changes in v4:
> - collected tags
> - addressed review comments got from sashiko.dev. For this:
> - added patches:
> -- dmaengine: sh: rz-dmac: Move interrupt request after everything is set up
> -- dmaengine: sh: rz-dmac: Fix incorrect NULL check on list_first_entry()
> 
> Changes in v3:
> - addressed review comments got from sashiko.dev. For this:
> - added patches 1-9
> - added patch "ASoC: renesas: rz-ssi: Add pause support"
> - dropped patches:
> -- dmaengine: sh: rz-dmac: Add enable status bit
> -- dmaengine: sh: rz-dmac: Add pause status bit
> 
> Changes in v2:
> - fixed typos in patch descriptions and patch titles
> - updated "ASoC: renesas: rz-ssi: Use generic PCM dmaengine APIs"
>    to fix the PIO mode
> - in patch "dmaengine: sh: rz-dmac: Add suspend to RAM support"
>    clear the RZ_DMAC_CHAN_STATUS_SYS_SUSPENDED status bit for
>    channel w/o RZ_DMAC_CHAN_STATUS_PAUSED_INTERNAL
> - per-patch updates can be found in individual patches changelog
> - rebased on top of next-20260319
> - updated the cover letter
> 
> Claudiu Beznea (18):
>    dmaengine: sh: rz-dmac: Move interrupt request after everything is set
>      up
>    dmaengine: sh: rz-dmac: Fix incorrect NULL check for
>      list_first_entry()
>    dmaengine: sh: rz-dmac: Use list_first_entry_or_null()
>    dmaengine: sh: rz-dmac: Use rz_dmac_disable_hw()
>    dmaengine: sh: rz-dmac: Add helper to compute the lmdesc address
>    dmaengine: sh: rz-dmac: Save the start LM descriptor
>    dmaengine: sh: rz-dmac: Add helper to check if the channel is enabled
>    dmaengine: sh: rz-dmac: Add helper to check if the channel is paused
>    dmaengine: sh: rz-dmac: Use virt-dma APIs for channel descriptor
>      processing
>    dmaengine: sh: rz-dmac: Refactor pause/resume code
>    dmaengine: sh: rz-dmac: Drop the update of channel->chctrl with
>      CHCTRL_SETEN
>    dmaengine: sh: rz-dmac: Add cyclic DMA support
>    dmaengine: sh: rz-dmac: Adjust rz_dmac_chan_get_residue() to return
>      error codes
>    dmaengine: sh: rz-dmac: Add runtime PM support
>    dmaengine: sh: rz-dmac: Add suspend to RAM support
>    ASoC: renesas: rz-ssi: Add pause support
>    ASoC: renesas: rz-ssi: Use generic PCM dmaengine APIs
>    dmaengine: sh: rz-dmac: Set the Link End (LE) bit on the last
>      descriptor
> 
>   drivers/dma/sh/rz-dmac.c   | 823 ++++++++++++++++++++++++++-----------
>   sound/soc/renesas/Kconfig  |   1 +
>   sound/soc/renesas/rz-ssi.c | 399 +++++++-----------
>   3 files changed, 723 insertions(+), 500 deletions(-)
>