Corrected typos in comments:
- contrl -> control
- Redifine -> Redefine
- pauload -> payload
Found by codespell.
Signed-off-by: Tomasz Unger <tomasz.unger@yahoo.pl>
---
drivers/staging/rtl8723bs/include/hal_com_reg.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/staging/rtl8723bs/include/hal_com_reg.h b/drivers/staging/rtl8723bs/include/hal_com_reg.h
index 479748d85626..06cbc3f92baf 100644
--- a/drivers/staging/rtl8723bs/include/hal_com_reg.h
+++ b/drivers/staging/rtl8723bs/include/hal_com_reg.h
@@ -20,7 +20,7 @@
#define REG_RSV_CTRL 0x001C
#define REG_RF_CTRL 0x001F
#define REG_AFE_XTAL_CTRL 0x0024
-#define REG_MAC_PHY_CTRL 0x002c /* for 92d, DMDP, SMSP, DMSP contrl */
+#define REG_MAC_PHY_CTRL 0x002c /* for 92d, DMDP, SMSP, DMSP control */
#define REG_EFUSE_CTRL 0x0030
#define REG_EFUSE_TEST 0x0034
#define REG_PWR_DATA 0x0038
@@ -186,7 +186,7 @@
/* */
/* */
-/* Redifine 8192C register definition for compatibility */
+/* Redefine 8192C register definition for compatibility */
/* */
/* */
#define EFUSE_CTRL REG_EFUSE_CTRL /* E-Fuse Control. */
@@ -273,7 +273,7 @@
/* */
/* 8192C (RCR) Receive Configuration Register (Offset 0x608, 32 bits) */
/* */
-#define RCR_APPFCS BIT(31) /* WMAC append FCS after pauload */
+#define RCR_APPFCS BIT(31) /* WMAC append FCS after payload */
#define RCR_APP_MIC BIT(30) /* MACRX will retain the MIC at the bottom of the packet. */
#define RCR_APP_ICV BIT(29) /* MACRX will retain the ICV at the bottom of the packet. */
#define RCR_APP_PHYST_RXFF BIT(28) /* PHY Status is appended before RX packet in RXFF */
---
base-commit: 7cb1c5b32a2bfde961fff8d5204526b609bcb30a
change-id: 20260526-fix-typos-hal-com-reg-3cdcb9e9eb95
Best regards,
--
Tomasz Unger <tomasz.unger@yahoo.pl>