.../devicetree/bindings/usb/ci-hdrc-usb2.yaml | 25 ++++++++++++++++++++-- 1 file changed, 23 insertions(+), 2 deletions(-)
Some Qualcomm SoCs such as apq8064 and msm8960 require a third "fs"
clock in addition to "iface" and "core", needed to propagate resets
through the controller and wrapper logic. Later SoCs such as msm8974
dropped this requirement and only use two clocks.
Note that the existing apq8064 and msm8960 DTS files currently specify
the "iface" and "core" clocks in reverse order compared to most newer
SoCs DTS, which causes dtbs_check warnings for these older SoCs. The
dependent patch series will fix that clock ordering.
Signed-off-by: Antony Kurniawan Soemardi <linux@smankusors.com>
---
This patch updates the ci-hdrc-usb2 binding to allow up to 3 clocks for
qcom,ci-hdrc, to accommodate Qualcomm SoCs that require an additional
"fs" clock for reset propagation.
This is a prerequisite for the following patch series currently under
review:
- ARM: dts: qcom: apq8064: Fix USB controller clocks [1]
- ARM: dts: qcom: msm8960: add RPM clock controller and fix USB
clocks [2]
Without this binding change, those series produce dtbs_check errors
due to the 3-clock entries in their respective device tree sources.
[1] https://lore.kernel.org/all/20260427-mainline-send-v1-sending-v2-6-dcaa9178007b@alex-min.fr/
[2] https://lore.kernel.org/all/20260514-msm8960-wifi-v2-5-7cbae45dab5e@smankusors.com/
---
Changes in v2:
- Reverted the removal of clock properties from the top level
- Enforced stricter clock property requirements with clock-names for
qcom,ci-hdrc compatible nodes
- Removed minItems from the else case, as it is already covered at the
top level
- Link to v1: https://patch.msgid.link/20260509-qcom-ci-hdrc-clock-fix-v1-1-f52386bf85da@smankusors.com
---
.../devicetree/bindings/usb/ci-hdrc-usb2.yaml | 25 ++++++++++++++++++++--
1 file changed, 23 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml b/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml
index 691d6cf02c27..a4575a413f42 100644
--- a/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml
+++ b/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml
@@ -45,11 +45,11 @@ properties:
clocks:
minItems: 1
- maxItems: 2
+ maxItems: 3
clock-names:
minItems: 1
- maxItems: 2
+ maxItems: 3
operating-points-v2:
description: A phandle to the OPP table containing the performance states.
@@ -91,6 +91,27 @@ allOf:
- $ref: chipidea,usb2-common.yaml#
- $ref: usb-hcd.yaml#
- $ref: usb-drd.yaml#
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: qcom,ci-hdrc
+ then:
+ properties:
+ clocks:
+ minItems: 2
+ clock-names:
+ minItems: 2
+ items:
+ - const: iface
+ - const: core
+ - const: fs
+ else:
+ properties:
+ clocks:
+ maxItems: 2
+ clock-names:
+ maxItems: 2
unevaluatedProperties: false
---
base-commit: 70390501d1944d4e5b8f7352be180fceb3a44132
change-id: 20260509-qcom-ci-hdrc-clock-fix-8ad5790ac636
Best regards,
--
Antony Kurniawan Soemardi <linux@smankusors.com>
On Sat, May 16, 2026 at 10:53:14AM +0000, Antony Kurniawan Soemardi wrote: > Some Qualcomm SoCs such as apq8064 and msm8960 require a third "fs" > clock in addition to "iface" and "core", needed to propagate resets > through the controller and wrapper logic. Later SoCs such as msm8974 > dropped this requirement and only use two clocks. > > Note that the existing apq8064 and msm8960 DTS files currently specify > the "iface" and "core" clocks in reverse order compared to most newer > SoCs DTS, which causes dtbs_check warnings for these older SoCs. The > dependent patch series will fix that clock ordering. > > Signed-off-by: Antony Kurniawan Soemardi <linux@smankusors.com> > --- > This patch updates the ci-hdrc-usb2 binding to allow up to 3 clocks for > qcom,ci-hdrc, to accommodate Qualcomm SoCs that require an additional > "fs" clock for reset propagation. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Best regards, Krzysztof
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