jhb100 is a Starfive new RISC-V SoC for datacenter BMC (BaseBoard
Managent Controller). Similar with Aspeed 27x0.
The jhb100 minimal system upstream is in progress:
https://patchwork.kernel.org/project/linux-riscv/cover/20260403054945.467700-1-changhuang.liang@starfivetech.com/
jhb100 GMAC still using designware GMAC core like JH7100 and JH7110,
and contains 2 SGMII interfaces, 1 RGMII/RMII interface, 1 RMII
interface. In JH7100/JH7110 dwmac-starfive.c have supported RGMII/RMII
interface. So require to add SGMII support to dwmac-starfive.c for JHB100.
SGMII serdes PHY has been integrated in JHB100 and do not have driver
setting.
In JHB100 EVB board, SGMII connect with motorcomm YT8531s external PHY
and support RJ45 ethernet port.
The patch base in 7.1-rc2
previous patch link:
v2: https://patchwork.kernel.org/project/netdevbpf/cover/20260417024523.107786-1-minda.chen@starfivetech.com/
changes
v3:
patch2: Add jhb100 attach to jh7110 compatibible, remove redundant commit
message. just descript the jhb100 hardware.
patch3: Add oneOf 5 clocks / 6 clocks to claim the clocks and make it
pass yaml test.
patch4: Add review tag and unused tag to phy interface.
v2:
1. patch1 Add the remove reason
2. patch2 rename rx clock to sgmii_rx
3. patch4 confirm sgmii rx clock exist, or will probe error
sgmii will not call starfive_dwmac_set_mode()
Minda Chen (5):
dt-bindings: net: starfive,jh7110-dwmac: Remove jh8100
dt-bindings: net: starfive,jh7110-dwmac: Add jhb100 support
dt-bindings: net: starfive,jh7110-dwmac: Add jhb100 sgmii rx clk
net: stmmac: starfive: Add jhb100 SGMII interface
net: stmmac: starfive: Add STMMAC_FLAG_SPH_DISABLE flag
.../bindings/net/starfive,jh7110-dwmac.yaml | 67 ++++++++++++++-----
.../ethernet/stmicro/stmmac/dwmac-starfive.c | 59 ++++++++++++----
2 files changed, 96 insertions(+), 30 deletions(-)
base-commit: 74fe02ce122a6103f207d29fafc8b3a53de6abaf
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2.17.1