LoongArch: Correct the definitions related to CSR_CPUID_COREID{_WIDTH}

[PATCH] LoongArch: Correct the definitions related to CSR_CPUID_COREID{_WIDTH}

Posted by Qiang Ma 1 month, 2 weeks ago

The valid bits of CPU Identity (CPUID) are 0 to 8
according to LoongArch Reference Manual, so change
11 to 9 for the related code.

Link: https://loongson.github.io/LoongArch-Documentation/LoongArch-Vol1-EN.html#cpu-identity

Signed-off-by: Qiang Ma <maqianga@uniontech.com>
---
 arch/loongarch/include/asm/loongarch.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/loongarch/include/asm/loongarch.h b/arch/loongarch/include/asm/loongarch.h
index 2a6bc99177d8..bc47df90fee6 100644
--- a/arch/loongarch/include/asm/loongarch.h
+++ b/arch/loongarch/include/asm/loongarch.h
@@ -429,8 +429,8 @@
 
 /* Config CSR registers */
 #define LOONGARCH_CSR_CPUID		0x20	/* CPU core id */
-#define  CSR_CPUID_COREID_WIDTH		11
-#define  CSR_CPUID_COREID		_ULCAST_(0x7ff)
+#define  CSR_CPUID_COREID_WIDTH		9
+#define  CSR_CPUID_COREID		_ULCAST_(0x1ff)
 
 #define LOONGARCH_CSR_PRCFG1		0x21	/* Config1 */
 #define  CSR_CONF1_VSMAX_SHIFT		12
-- 
2.20.1

Re: [PATCH] LoongArch: Correct the definitions related to CSR_CPUID_COREID{_WIDTH}

Posted by Huacai Chen 1 month, 2 weeks ago

Can you do some investigation about the history before coding?
9559d5806319a9254d9053b22a31324e1929aac ("LoongArch: Increase max
supported CPUs up to 2048")

Huacai

On Tue, Apr 28, 2026 at 8:36 PM Qiang Ma <maqianga@uniontech.com> wrote:
>
> The valid bits of CPU Identity (CPUID) are 0 to 8
> according to LoongArch Reference Manual, so change
> 11 to 9 for the related code.
>
> Link: https://loongson.github.io/LoongArch-Documentation/LoongArch-Vol1-EN.html#cpu-identity
>
> Signed-off-by: Qiang Ma <maqianga@uniontech.com>
> ---
>  arch/loongarch/include/asm/loongarch.h | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/loongarch/include/asm/loongarch.h b/arch/loongarch/include/asm/loongarch.h
> index 2a6bc99177d8..bc47df90fee6 100644
> --- a/arch/loongarch/include/asm/loongarch.h
> +++ b/arch/loongarch/include/asm/loongarch.h
> @@ -429,8 +429,8 @@
>
>  /* Config CSR registers */
>  #define LOONGARCH_CSR_CPUID            0x20    /* CPU core id */
> -#define  CSR_CPUID_COREID_WIDTH                11
> -#define  CSR_CPUID_COREID              _ULCAST_(0x7ff)
> +#define  CSR_CPUID_COREID_WIDTH                9
> +#define  CSR_CPUID_COREID              _ULCAST_(0x1ff)
>
>  #define LOONGARCH_CSR_PRCFG1           0x21    /* Config1 */
>  #define  CSR_CONF1_VSMAX_SHIFT         12
> --
> 2.20.1
>

Re: [PATCH] LoongArch: Correct the definitions related to CSR_CPUID_COREID{_WIDTH}

Posted by Qiang Ma 1 month, 2 weeks ago

在 2026/4/28 20:47, Huacai Chen 写道:
> Can you do some investigation about the history before coding?
> 9559d5806319a9254d9053b22a31324e1929aac ("LoongArch: Increase max
> supported CPUs up to 2048")

Uh, uh, uh, my fault. I'll be more careful next time. Besides the 
document, there's also the code history submission.

>
> Huacai
>
> On Tue, Apr 28, 2026 at 8:36 PM Qiang Ma <maqianga@uniontech.com> wrote:
>> The valid bits of CPU Identity (CPUID) are 0 to 8
>> according to LoongArch Reference Manual, so change
>> 11 to 9 for the related code.
>>
>> Link: https://loongson.github.io/LoongArch-Documentation/LoongArch-Vol1-EN.html#cpu-identity
>>
>> Signed-off-by: Qiang Ma <maqianga@uniontech.com>
>> ---
>>   arch/loongarch/include/asm/loongarch.h | 4 ++--
>>   1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/arch/loongarch/include/asm/loongarch.h b/arch/loongarch/include/asm/loongarch.h
>> index 2a6bc99177d8..bc47df90fee6 100644
>> --- a/arch/loongarch/include/asm/loongarch.h
>> +++ b/arch/loongarch/include/asm/loongarch.h
>> @@ -429,8 +429,8 @@
>>
>>   /* Config CSR registers */
>>   #define LOONGARCH_CSR_CPUID            0x20    /* CPU core id */
>> -#define  CSR_CPUID_COREID_WIDTH                11
>> -#define  CSR_CPUID_COREID              _ULCAST_(0x7ff)
>> +#define  CSR_CPUID_COREID_WIDTH                9
>> +#define  CSR_CPUID_COREID              _ULCAST_(0x1ff)
>>
>>   #define LOONGARCH_CSR_PRCFG1           0x21    /* Config1 */
>>   #define  CSR_CONF1_VSMAX_SHIFT         12
>> --
>> 2.20.1
>>