include/dt-bindings/reset/altr,rst-mgr-s10.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
Add COMBOPHY_RESET definition at index 38 for the combo PHY reset
control on Altera Agilex5 SoCs. This reset is used by peripherals
such as the SD/eMMC controller that share the combo PHY.
Signed-off-by: Tanmay Kathpalia <tanmay.kathpalia@altera.com>
---
include/dt-bindings/reset/altr,rst-mgr-s10.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/dt-bindings/reset/altr,rst-mgr-s10.h b/include/dt-bindings/reset/altr,rst-mgr-s10.h
index 04c4d0c6fd34..c2505b9eb63e 100644
--- a/include/dt-bindings/reset/altr,rst-mgr-s10.h
+++ b/include/dt-bindings/reset/altr,rst-mgr-s10.h
@@ -22,7 +22,7 @@
#define USB0_RESET 35
#define USB1_RESET 36
#define NAND_RESET 37
-/* 38 is empty */
+#define COMBOPHY_RESET 38
#define SDMMC_RESET 39
#define EMAC0_OCP_RESET 40
#define EMAC1_OCP_RESET 41
--
2.43.7
Hi Tanmay On 4/28/26 04:26, Tanmay Kathpalia wrote: > Add COMBOPHY_RESET definition at index 38 for the combo PHY reset > control on Altera Agilex5 SoCs. This reset is used by peripherals > such as the SD/eMMC controller that share the combo PHY. > > Signed-off-by: Tanmay Kathpalia <tanmay.kathpalia@altera.com> > --- > include/dt-bindings/reset/altr,rst-mgr-s10.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/include/dt-bindings/reset/altr,rst-mgr-s10.h b/include/dt-bindings/reset/altr,rst-mgr-s10.h > index 04c4d0c6fd34..c2505b9eb63e 100644 > --- a/include/dt-bindings/reset/altr,rst-mgr-s10.h > +++ b/include/dt-bindings/reset/altr,rst-mgr-s10.h > @@ -22,7 +22,7 @@ > #define USB0_RESET 35 > #define USB1_RESET 36 > #define NAND_RESET 37 > -/* 38 is empty */ > +#define COMBOPHY_RESET 38 > #define SDMMC_RESET 39 > #define EMAC0_OCP_RESET 40 > #define EMAC1_OCP_RESET 41 Please include the patch(es) that will make use of this change. Thanks, Dinh
Hi Dinh, On 4/28/2026 6:02 PM, Dinh Nguyen wrote: > Hi Tanmay > > On 4/28/26 04:26, Tanmay Kathpalia wrote: >> Add COMBOPHY_RESET definition at index 38 for the combo PHY reset >> control on Altera Agilex5 SoCs. This reset is used by peripherals >> such as the SD/eMMC controller that share the combo PHY. >> >> Signed-off-by: Tanmay Kathpalia <tanmay.kathpalia@altera.com> >> --- >> include/dt-bindings/reset/altr,rst-mgr-s10.h | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/include/dt-bindings/reset/altr,rst-mgr-s10.h >> b/include/dt-bindings/reset/altr,rst-mgr-s10.h >> index 04c4d0c6fd34..c2505b9eb63e 100644 >> --- a/include/dt-bindings/reset/altr,rst-mgr-s10.h >> +++ b/include/dt-bindings/reset/altr,rst-mgr-s10.h >> @@ -22,7 +22,7 @@ >> #define USB0_RESET 35 >> #define USB1_RESET 36 >> #define NAND_RESET 37 >> -/* 38 is empty */ >> +#define COMBOPHY_RESET 38 >> #define SDMMC_RESET 39 >> #define EMAC0_OCP_RESET 40 >> #define EMAC1_OCP_RESET 41 > > Please include the patch(es) that will make use of this change. > Thanks for the feedback, I will incorporate this patch as part of the driver series Regards, Tanmay
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